alex/esp-idf
alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2024-10-05 20:47:46 -04:00
Code Issues Actions 2 Packages Projects Releases Wiki Activity
25,261 Commits 20 Branches 148 Tags 384 MiB
6a60ecf780
Commit Graph

393 Commits

Author SHA1 Message Date
Song Ruo Jing
6a60ecf780 soc_caps: Introduce SOC_LEDC_SUPPORTED and SOC_I2C_SUPPORTED caps to IDF 
Wrap the ledc, i2c source files with the new caps in CMakeLists and linker.lf.
This could avoid potential source file not found warning during linking time.
 2022-08-31 20:43:22 +08:00
Armando
2d44dc1eed mmu: driver framework, for vaddr maintenance 
This commit gives basic mmu driver framework. Now it is able to maintain
mmu virtual address usage on esp32, esp32s2 and esp32s3. Usage to
external virtual address should rely on mmu functions to know which
address range is available, instead of hardcoded.

This commit also improves psram memory that is added to the heap
allocator. Now it's added to the heap, according to the memory
alignment.

Closes https://github.com/espressif/esp-idf/issues/8295
 2022-08-26 17:59:06 +08:00
Michael (XIAO Xufeng)
0a2e5a7774 Merge branch 'feat/support_esp32c2_uart' into 'master' 
uart: update console docs about frequency for ESP32-C2, move frequency of clock sources out of HAL

Closes IDF-5424 and IDF-4332

See merge request espressif/esp-idf!19274
 2022-08-22 14:24:26 +08:00
Michael (XIAO Xufeng)
e7dbfd65cb Merge branch 'feature/support_7.2.8_soc/pvt-dig' into 'master' 
rtc: auto adjust LDO voltage based on pvt-dig saved in efuse

Closes IDF-4873

See merge request espressif/esp-idf!16365
 2022-08-22 11:43:07 +08:00
Michael (XIAO Xufeng)
746f4b814c uart: move frequency of clock sources out of HAL 2022-08-15 18:55:43 +00:00
zlq
80c821a9aa 1.add ldo parameters in efuse table; 2.set ldo based on pvt-efuse; 3.ldo voltage is changed based on cpu freq 2022-08-15 18:03:55 +08:00
Sudeep Mohanty
6b010612a2 rtci2c: Corrected the register base addr reference for RTC I2C on esp32s3 
This commit corrects the register base address reference for RTC I2C on
esp32s3.
 2022-08-15 10:46:40 +02:00
Erhan Kurubas
66e3a6f6a3 esp32s3: fix interrupt names used by SystemView 2022-08-11 11:23:03 +02:00
Island
fd8101498b Merge branch 'bugfix/fix_bluetooth_cap_define_and_doc' into 'master' 
Bugfix/fix bluetooth cap define and doc

Closes BC-1298 and BC-1297

See merge request espressif/esp-idf!19149
 2022-08-11 16:51:08 +08:00
Sachin Parekh
41c5359703 esp32s3: Update world controller headers 2022-08-10 07:22:02 +00:00
Geng Yuchao
0a1d8c1e09 Fix soc caps define for all chips 2022-08-08 20:50:28 +08:00
jingli
ee3423834e kconfig: refactor xtal freq kconfig to common configuration item 2022-08-05 19:12:29 +08:00
Wan Lei
1265a2db9d Merge branch 'refactor/add_missing_include_path_for_soc_struct_files' into 'master' 
Fix check_public_headers violations for soc component

Closes IDF-5397

See merge request espressif/esp-idf!19158
 2022-08-01 10:14:04 +08:00
wuzhenghui
7cb9304b65 Clean IRAM and DRAM address space conversion macros 2022-07-29 17:07:39 +08:00
wanlei
bb5a95f1aa soc: fix register header files not self-contain 2022-07-29 11:18:06 +08:00
wuzhenghui
21a4eda4d4 Use the entire sharedbuffer space as the heap of the D/IRAM attribute 2022-07-29 10:51:47 +08:00
morris
d94432fea8 systimer: refactor hal to accomodate more xtal choices 2022-07-25 16:08:52 +08:00
morris
741b031e83 soc: added SOC_TOUCH_SENSE_SUPPORTED macro 2022-07-22 00:12:36 +00:00
laokaiyao
edee3ee3cd i2s: add slot sequence table 
Closes: https://github.com/espressif/esp-idf/issues/9208

When I2S is configured into different modes, the slot sequence varies.
This commit updates slot sequence tables and corresponding descriptions
in (both code and programming guide).
 2022-07-21 15:52:39 +08:00
morris
4154eaec93 sdm: clean up soc/hal/ll code 2022-07-20 14:59:50 +08:00
Armando (Dou Yiwen)
9f6f61345b Merge branch 'feature/adc_driver_ng' into 'master' 
ADC Driver NG

Closes IDF-4560, IDF-3908, IDF-4225, IDF-2482, IDF-4111, IDF-3610, IDF-4058, IDF-3801, IDF-3636, IDF-2537, IDF-4310, IDF-5150, IDF-5151, and IDF-4979

See merge request espressif/esp-idf!17960
 2022-07-19 21:28:31 +08:00
Cao Sen Miao
53580a62b5 I2C: Fullfill the I2C clock tree, and support 26M XTAL on ESP32-C2 2022-07-19 11:41:42 +08:00
Armando
5b523a3313 esp_adc: new esp_adc component and adc drivers 2022-07-15 18:31:00 +08:00
Jiang Jiang Jian
b610b47a83 Merge branch 'feature/esp32s3_memprot_additional_improvements' into 'master' 
[System/Security] Memprot after-merge improvements (v5.0)

Closes IDF-5263 and IDF-5208

See merge request espressif/esp-idf!18893
 2022-07-13 15:48:20 +08:00
Jiang Jiang Jian
3630713e5f Merge branch 'docs/esp32c2_sys_feature_api_guides' into 'master' 
docs: update system API-guides for ESP32-C2

Closes IDF-4202, IDF-4213, and IDF-4222

See merge request espressif/esp-idf!18979
 2022-07-12 10:59:12 +08:00
Marius Vikhammer
d62421619c docs: update system API-guides for ESP32-C2 2022-07-12 09:32:43 +08:00
Song Ruo Jing
ea97cc93ea Merge branch 'feature/c2_systimer_26mhz' into 'master' 
esp32c2: 26 MHz XTAL support: Kconfig option, systimer support

Closes IDF-5412 and IDF-5413

See merge request espressif/esp-idf!18835
 2022-07-11 16:17:25 +08:00
songruojing
b3d8db3ae2 bootloader, esp_system: esp32c2 console uart to support 26MHz xtal 
Gets the XTAL frequency from the RTC storage register, remove UART_CLK_FREQ_ROM macro from soc.h
 2022-07-11 12:24:58 +08:00
Ivan Grokhotkov
5b54ae76d4 esp_timer, hal: add support for non-integer systimer frequency 
When ESP32-C2 is paired with a 26 MHz XTAL, the systimer tick
frequency becomes equal to 26 / 2.5 = 10.4 MHz. Previously we always
assumed that systimer tick frequency is integer (and 1 MHz * power of
two, above that!).
This commit introduces a new LL macro, SYSTIMER_LL_TICKS_PER_US_DIV.
It should be set in such a way that:

1. SYSTIMER_LL_TICKS_PER_US / SYSTIMER_LL_TICKS_PER_US_DIV equals the
   actual systimer tick frequency,
2. and SYSTIMER_LL_TICKS_PER_US is integer.

For ESP32-C2 this means that SYSTIMER_LL_TICKS_PER_US = 52 and
SYSTIMER_LL_TICKS_PER_US_DIV = 5.

This introduced two possible issues:

1. Overflow when multiplying systimer counter by 5
   - Should not be an issue, since systimer counter is 52-bit, so
     counter * 5 is no more than 55-bit.
2. The code needs to perform:
   - divide by 5: when converting from microseconds to ticks
   - divide by 52: when converting from ticks to microseconds
   The latter potentially introduces a performance issue for the
   esp_timer_get_time function.
 2022-07-11 12:24:37 +08:00
Martin Vychodil
0c87ae2a91 System/Security: Memprot API unified (ESP32S3) 
Added missing features and improvements
 2022-07-09 22:57:51 +02:00
Jiang Jiang Jian
a7bf3af687 Merge branch 'bugfix/reset_ble_hw_on_inititalization' into 'master' 
component/bt: reset Bluetooth hardware during controller inititalization on ESP32-C3/ESP32-S3

Closes BT-2402

See merge request espressif/esp-idf!18831
 2022-07-08 16:21:41 +08:00
morris
75bd6fc2d9 Merge branch 'contrib/github_pr_9302' into 'master' 
ESP32S3 USB external PHY pinout (GitHub PR)

Closes IDFGH-7761

See merge request espressif/esp-idf!18909
 2022-07-07 16:17:26 +08:00
morris
b0e228f756 soc: update copyright for usb phy pins 2022-07-07 11:50:06 +08:00
lsita
9ceff23c6d USB external PHY pinout set as in Reference Manual Figure 29-3. 2022-07-06 14:54:35 +02:00
wangmengyang
f86efb2bc2 fix licence copyright for header file syscon_reg.h on ESP32C3 and ESP32S3 2022-07-06 16:24:03 +08:00
wangmengyang
1d55f12c2d component/bt: reset Bluetooth hardware during controller inititalization on ESP32-C3/ESP32-S3 
1. Rename MACROs SYSTEM_WIFI_RST_EN register bit fields to be more recognizable
2. reset Bluetooth baseband and clock bits to fix the issue of task watchdog triggered during controller initialization due to invalid hardware state
 2022-07-06 16:23:48 +08:00
KonstantinKondrashov
0f8ff5aa15 efuse: Adds major and minor versions and others 2022-07-05 14:38:27 +08:00
Omar Chebib
cd48baf979 Refactor: move regi2c_*.h header files from esp_hw_support to soc component 
When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
 2022-06-30 09:40:44 +00:00
Armando
31b3f31ef4 ext_mem: make memory region check strict 2022-06-28 14:17:44 +08:00
Mahavir Jain
c619e2162d Merge branch 'feature/memprot_settings_to_soc_caps' into 'master' 
esp_system: move MEMPROT related configuration to soc capability header

Closes IDF-4506

See merge request espressif/esp-idf!18645
 2022-06-24 18:08:19 +08:00
Mahavir Jain
0a12eab32e
esp_system: move MEMPROT related configuration to soc capability header 
Closes IDF-4506
 2022-06-23 10:29:42 +05:30
Zim Kalinowski
136c873364 Merge branch 'refactor/g0_for_xtensa' into 'master' 
G0: Support Xtensa targets for G0-only compilation

Closes IDF-3087

See merge request espressif/esp-idf!18538
 2022-06-23 07:28:37 +08:00
muhaidong
96f86e0bb4 esp_wifi: esp32c2 does not support wifi mesh 2022-06-21 16:48:52 +08:00
muhaidong
b48b9beace esp_wifi: esp32c2 does not support csi. 2022-06-20 21:47:51 +08:00
morris
865937fba3 Merge branch 'bugfix/fix_esp32c2_dose_not_support_wapi' into 'master' 
esp_wifi: esp32c2 does not support wapi

Closes IDF-4216

See merge request espressif/esp-idf!18573
 2022-06-20 21:31:54 +08:00
muhaidong
2ccce0ca41 esp_wifi: update comments of WI-FI CAPS in soc_caps.h 2022-06-20 19:43:16 +08:00
Omar Chebib
8fae0f0753 G0: Support Xtensa targets for G0-only compilation 
G0-only example now supports Xtensa targets. This means that G0 layer
does not depend on G1+ layers anymore
 2022-06-20 11:34:20 +00:00
Martin Vychodil
692b9980b5 Merge branch 'feature/memprot_api_unified_s3_2' into 'master' 
System/Security: Memprot API unified (ESP32S3)

See merge request espressif/esp-idf!16169
 2022-06-20 17:34:22 +08:00
muhaidong
6ca2804107 esp_wifi: esp32c2 does not support wapi. 2022-06-20 11:42:12 +08:00
Martin Vychodil
339fcbf14d System/Security: Memprot API unified (ESP32S3) 
Unified Memory protection API for all PMS-aware chips - ESP32S3 port
 2022-06-20 02:36:44 +00:00