Commit Graph

19 Commits

Author SHA1 Message Date
morris
61f89b97c6 bringup esp32-s3 on FPGA 2020-09-22 15:15:03 +08:00
morris
2917651478 esp_rom: extract common ets apis into esp_rom_sys.h 2020-07-27 15:27:01 +08:00
Felipe Neves
b6dba84323 ulp: added support to building code for riscv ULP coprocessor 2020-07-15 15:28:49 -03:00
morris
e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00
Dmitry
1518c410bc A switch between esp32 and esp32s2betta added to the ULP build process.
The new bin utils will have extension esp32s2ulp-elf, and they have to be placed to the bin directory.
2019-11-22 09:03:13 +03:00
Angus Gratton
04ae56806c Merge branch 'master' into feature/esp32s2beta_update 2019-08-08 15:26:58 +10:00
fuzhibo
b055bff580 1.update touch driver; 2.update adc/dac driver; 3.add temp sensor driver; 2019-08-05 16:21:18 +08:00
suda-morris
84b2f9f14d build and link hello-world for esp32s2beta 2019-06-11 13:07:37 +08:00
Roland Dobai
0ae53691ba Rename Kconfig options (components/esp32) 2019-05-21 09:09:01 +02:00
morris
956c25dedd move esp32 chip specific includes to esp32/xxx.h 2019-03-18 17:14:05 +08:00
krzychb
5eee2bf37d Corrected ULP wakeup period setup API to account for time the ULP FSM spends on internal tasks before being able to execute the program. Inspired by https://esp32.com/viewtopic.php?f=2&t=7081. 2018-09-10 07:08:12 +02:00
Ivan Grokhotkov
98e15df7f6 examples: add ULP ADC example 2017-05-16 13:15:02 +08:00
Dmitry Yakovlev
a6e4e89592 ulp: add build system integration and example 2017-03-27 12:41:00 +08:00
Ivan Grokhotkov
0465528431 ulp: don’t override SENS_SLEEP_CYCLES_S0
SENS_SLEEP_CYCLES_S0 may be set by the application to control ULP
program timer.
2017-02-22 14:41:10 +08:00
Ivan Grokhotkov
7df75c00c7 ulp: fix a bug that ULP may not be restarted correctly 2017-02-22 14:40:36 +08:00
Ivan Grokhotkov
d0d2c4cb49 esp32,ulp: add tests for TSENS 2017-02-22 14:40:36 +08:00
Ivan Grokhotkov
7a527896dc ulp: use timer to start ULP, fix I_ANDI bug, add tests
Starting the ULP using SENS_SAR_START_FORCE_REG doesn’t disable clock gating of RTC fast clock.
When SoC goes into deep sleep mode, RTC fast clock gets gated, so ULP can no longer run.
Instead, it has to be started using the timer (RTC_CNTL_ULP_CP_SLP_TIMER_EN bit).
When ULP is enabled by the timer, clock also gets enabled.
2016-12-16 20:25:38 +08:00
Chu Shu Chen
b1db2721dc driver: add rtc module and bugfix gpio32 gpio33
feature(rtc_module):add rtc module

1. add rtc io control API (pull,output and input)
2. add touch pad API (touch pad read and interrupt)
3. add adc1 API (the max width is 12 Bits and support attenuation)
4. add hall sensor API (support hall sensor read )
5. add dac API (the width is 8 Bits)

bugfix(gpio):gpio32 and gpio33 can not output and input

the gpio32 and gpio33 is initialize by librtc.a,and gpio_config not initialize the gpio as
digital gpio.they can not output and input,when users use gpio32 or gpio33.And there are some problems
about others driver ,when they use gpio32 or gpio33 as  matrix.
2016-12-07 15:56:13 +08:00
Ivan Grokhotkov
ab3677d64c initial support for generation of ULP coprocessor code 2016-12-01 20:26:47 -08:00