alex/esp-idf
alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2024-10-05 20:47:46 -04:00
Code Issues Actions 2 Packages Projects Releases Wiki Activity
31,818 Commits 20 Branches 148 Tags 384 MiB
5fcd908d26
Commit Graph

470 Commits

Author SHA1 Message Date
Laukik Hase
5fcd908d26
refactor(esp_hw_support): Remove redundant PMP entry for ROM region 
- The ROM text and data sections share the address range
    (see SOC_I/DROM_MASK_LOW - SOC_I/DROM_MASK_HIGH).
  - Initially, we had two PMP entries for this address range - one marking the
    region as RX and the other as R.
  - However, the latter entry is redundant as the former locks the PMP settings.
  - We can divide the ROM region into text and data sections later when we
    define boundaries marking these regions from the ROM.
 2024-03-01 10:25:25 +05:30
Laukik Hase
5173ba1777
fix(esp_hw_support): Fix the I/DCACHE region PMP protection 2024-03-01 10:25:25 +05:30
Aditya Patwardhan
55c5c8367b Merge branch 'bugfix/soc_cpu_subsys_region_v5.1' into 'release/v5.1' 
fix(soc): change debug addr range to CPU subsystem range (v5.1)

See merge request espressif/esp-idf!28672
 2024-02-28 11:16:48 +08:00
Jiang Jiang Jian
76152c80a2 Merge branch 'c6_auto_dbias_master_hsq_v5.1' into 'release/v5.1' 
ESP32C6: Active & sleep dbg and dbias get from efuse to fix the voltage (v5.1)

See merge request espressif/esp-idf!28722
 2024-02-28 10:49:13 +08:00
hongshuqing
80378b809e feat(pmu): set fix voltage to different mode for esp32c6 2024-02-22 15:01:14 +08:00
Jakob Hasse
a66234b6de fix(esp_hw_support): Removed unused include directories from cmake 
* Closes https://github.com/espressif/esp-idf/issues/12700
 2024-02-21 11:41:11 +08:00
hongshuqing
9f5cd217a0 feat(pmu): set fix voltage to different mode for esp32h2 
h2 remove include
 2024-01-26 11:39:16 +08:00
Mahavir Jain
614ad494f6
fix(soc): change debug addr range to CPU subsystem range 
For C6/H2/P4/C5, there is no SoC specific debug range. Instead the same
address range is part of CPU Subsystem range which contains debug mode
specific code and interrupt config registers (CLINT, PLIC etc.).

For now the PMP entry is provided with RWX permission for both machine
and user mode but we can save this entry and allow the access to only
machine mode for this range.

For P4/C5 case, this PMP entry can have RW permission as the debug mode
specific code is not present in this memory range.
 2024-01-24 12:52:27 +05:30
Jiang Jiang Jian
aa2793f3f1 Merge branch 'feature/support_hw_trigger_regdma_when_pu_top_v5.1' into 'release/v5.1' 
fix(pm): trigger regdma retention by PMU when TOP is not power down on esp32H2 (backport v5.1)

See merge request espressif/esp-idf!28342
 2024-01-18 11:06:51 +08:00
Lou Tianhao
2ecbfecedf feat(pm): support PMU trigger regdma when PU TOP 2024-01-16 14:01:22 +08:00
Xiao Xufeng
a055fcbda4 fix(rtc): fixed bbpll not calibrated from bootloader issue 2024-01-05 10:19:20 +08:00
chaijie@espressif.com
630a8ff709 fix(bbpll): fix bbpll calibration may stop early bug(ESP32C2/S3/C6/H2) 2024-01-05 03:24:20 +08:00
Michael (XIAO Xufeng)
67043f557f feat(soc): Increase max supported version of C3 to 1.99 2024-01-03 18:02:49 +08:00
wuzhenghui
c33dd0f4a2
fix(esp_hw_support/sleep): wait flash ready after non-pd_top lightsleep for esp32c6 2023-12-27 15:36:15 +08:00
Jiang Jiang Jian
a8a3adcfb8 Merge branch 'bugfix/put_extra_link_retention_in_iram_5.1' into 'release/v5.1' 
fix(pm): place extra link opt in iram(Backport v5.1)

See merge request espressif/esp-idf!27898
 2023-12-21 11:28:38 +08:00
Lou Tianhao
1419db4b91 change(pm): change macro SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG 2023-12-19 11:44:23 +08:00
cjin
7d2ab4c14d fix(pm): place extra link opt in iram 2023-12-14 11:17:54 +08:00
wuzhenghui
5dac3d9e03 fix(esp_hw_support/sleep): fix rtc_time_us_to_slowclk div zero in deepsleep process 
Closes https://github.com/espressif/esp-idf/issues/12695
 2023-12-11 09:24:07 +00:00
Jiang Guang Ming
03582a8cfe fix(esp32c3): Update esp32c3 chip revision 2023-11-27 11:32:50 +00:00
wuzhenghui
61bb3fb67f fix(esp_hw_support): clear all type ULP wakeup intr status at ulp wakeup source enable 2023-11-16 11:49:40 +08:00
Jiang Jiang Jian
cee24a6ce1 Merge branch 'bringup/support_callback_mechanism_in_lightsleep_flow_v5.1' into 'release/v5.1' 
feat(pm): support callback mechanism in lightsleep flow(backport v5.1)

See merge request espressif/esp-idf!26365
 2023-11-14 15:33:19 +08:00
Jiang Jiang Jian
1ed40720d6 Merge branch 'bugfix/lp_active_slow_clock_domain_default_power_down_v5.1' into 'release/v5.1' 
backport v5.1: In the LP ACTIVE state, the slow clock power domain is by default in a powered-off state

See merge request espressif/esp-idf!26601
 2023-11-14 15:09:02 +08:00
Armando
6de9757a4b fix(adc): rename ADC_ATTEN_DB_11 to ADC_ATTEN_DB_12 
By design, it's 12 dB. There're errors among chips, so the actual
attenuation will be 11dB more or less
 2023-11-07 14:09:21 +08:00
Lou Tianhao
925da11115 feat(PowerManagement/lightsleep): Support ESP_SLEEP_EVENT_CALLBACKS 2023-11-02 11:05:38 +00:00
Li Shuai
9d97513147 change(Power Management): the xpd_xtal32k value depends on system slow clock source config option when pmu initialize 2023-10-24 17:15:10 +08:00
zlq
17c2931309 feat(bootloader): adjust dbias of bootloader, change clock of H2 to 64 
MHz
 2023-10-16 14:35:45 +08:00
Xiao Xufeng
81dcc61008 Revert "feat(volt): chip auto adjust volt for esp32c6 & esp32h2" 
This reverts commit b221f87e00.
 2023-10-16 14:35:41 +08:00
gaoxu
0538a7b138 fix(adc): power settings not taking into effect on H2 2023-09-28 16:24:39 +00:00
wuzhenghui
49013a0560 feat(modem_clock): separate management of modem_adc_common_fe clock and modem_private_fe 2023-09-28 16:24:39 +00:00
gaoxu
b183b88463 fix(adc): power settings not taking into effect on C6 2023-09-28 16:24:39 +00:00
zlq
7bbe19d92f feat(volt): chip auto adjust volt for esp32c6 & esp32h2 2023-09-27 06:39:59 +00:00
Jiang Jiang Jian
cba086c3a8 Merge branch 'bugfix/fix_sleep_risk_vol_param_to_v5.1' into 'release/v5.1' 
fix(sleep): fix inproper sleep vol param for esp32c6 & esp32h2 (v5.1)

See merge request espressif/esp-idf!26074
 2023-09-27 14:36:10 +08:00
harshal.patil
f6b589e275
feat(esp_hw_support): Added locking mechanism for the ECDSA and ECC peripheral 2023-09-25 14:33:04 +05:30
harshal.patil
710b9d228b
feat(esp_hw_support): Add esp_crypto_lock layer for esp32c2 2023-09-25 14:31:18 +05:30
chaijie@espressif.com
80f7e913a0 fix(sleep): fix inproper sleep vol param for esp32c6 & esp32h2 2023-09-25 16:39:46 +08:00
hongshuqing
bb33a2bf6b fix cpu switches freq bug s2s3 to v5.1 2023-09-19 11:27:08 +08:00
Jiang Jiang Jian
b638cb3335 Merge branch 'bringup/esp32h2_deep_sleep_for_rebase_v5.1' into 'release/v5.1' 
esp32h2: support deep_sleep(backport v5.1)

See merge request espressif/esp-idf!24962
 2023-08-23 20:12:01 +08:00
wuzhenghui
aaf04f514f fix(esp_hw_support): manage i2c_ana_mst clock witch modem clock driver 2023-08-04 12:04:40 +08:00
Lou Tianhao
8833c2bc87 change(pm/deepsleep): Update deep_sleep pmu analog parameter for esp32h2 2023-08-03 16:46:54 +08:00
Lou Tianhao
4bc5e24f82 feat(pm/deepsleep): Support deep_sleep example and deep_sleep_wake_stub example for esp32h2 2023-08-03 16:46:54 +08:00
Jiang Jiang Jian
afcf3e261b Merge branch 'bugfix/fix_cache_data_mem_corrupt_after_sleep_v5.1' into 'release/v5.1' 
fix(lightsleep): Suspend cache before goto sleep to avoid cache load wrong data (backport v5.1)

See merge request espressif/esp-idf!25087
 2023-08-02 11:21:33 +08:00
Jiang Jiang Jian
2f9bb7937a Merge branch 'bugfix/remove__warning_for_rc_fast_calibration_h2_v5.1' into 'release/v5.1' 
remove(clk): remove warning log if RC_FAST clock calibration is needed on esp32h2 (v5.1)

See merge request espressif/esp-idf!25075
 2023-08-01 10:53:46 +08:00
Jiang Jiang Jian
fbfdd97343 Merge branch 'bugfix/esp32h2_revision_config_prompt_v5.1' into 'release/v5.1' 
fix(esp32h2): correct typo in chip revision prompt (v5.1)

See merge request espressif/esp-idf!25024
 2023-08-01 10:53:26 +08:00
wuzhenghui
c5703cff8d fix(lightsleep): fix access pu_cfg after sleep wake wakeup which is linked to flash 2023-07-31 21:41:56 +08:00
Song Ruo Jing
59672cee17 remove(clk): remove warning log if RC_FAST clock calibration is needed on esp32h2 2023-07-31 10:48:55 +08:00
Mahavir Jain
a0d882c25e fix(esp32h2): correct typo in chip revision prompt 2023-07-28 13:45:28 +00:00
wuzhenghui
9df77e015a fix(rtc_clk): fix i2c master clock missing in bbpll configure 2023-07-21 11:01:56 +00:00
Li Shuai
ee3452d410 light sleep: enable system clock in PMU HP sleep state when selecting a 40 MHz XTAL as low power clock source of ble 2023-07-14 11:07:41 +08:00
Lou Tianhao
d191b0c540 Power Management: fix hp xtal wait bug for esp32h2 and esp32c6 2023-07-11 14:53:43 +08:00
Lou Tianhao
60a3e5053e Power Management: support pu xtal in light sleep for esp32h2 2023-07-11 14:53:15 +08:00