Michael (XIAO Xufeng)
caf1e9d570
Merge branch 'bugfix/soc_caps_implicit_inc' into 'master'
...
HAL: explicitly include soc_caps.h
Closes IDFGH-4547
See merge request espressif/esp-idf!11895
2021-01-11 14:18:10 +08:00
Angus Gratton
5b68cf9de4
Merge branch 'feature/c3_ds' into 'master'
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ESP32-C3 Digital Signature, HAL layer for DS.
Closes IDF-2111
See merge request espressif/esp-idf!10813
2021-01-07 13:07:28 +08:00
Marius Vikhammer
58c3f6a421
hal: explicitly include soc_caps.h
...
Many files in the HAL layer depended on SOC_ macros without
explicitly including soc_caps.h
2021-01-07 10:13:17 +08:00
morris
1f9629da9f
hal: put cpu_ll_get_core_id to IRAM
2021-01-05 15:39:46 +08:00
morris
9e7d2c0065
esp32c3: format and clean up interrupt and os port code
2021-01-05 15:39:46 +08:00
Felipe Neves
72e4655d4e
interrupt: removed descriptor table from esp32c3 interrupt hal.
2021-01-05 15:39:46 +08:00
Felipe Neves
5d316ac142
interrupt: added INTC FLEXIBLE capabillity to esp32c3 CPU caps
2021-01-05 15:39:46 +08:00
Felipe Neves
544a3f7df5
interrupt-allocator: reject vector allocation if its marked as not-implemented. and search to next available
2021-01-05 15:39:46 +08:00
Felipe Neves
f4781d3b1d
freertos: riscv port now uses interrupt allocator and crosscore interrupt
2021-01-05 15:39:46 +08:00
Felipe Neves
09bc1580be
intr_allocator: add abstractions for priority, type and edge-ack interrupt controller functions
2021-01-05 15:39:46 +08:00
Jakob Hasse
e532a29288
[Peripheral/Security] DS peripheral driver
2021-01-05 12:26:59 +08:00
Omar Chebib
b6a450f824
panic: Add support for SoC-level panic
...
SoC level exceptions such as watchdog timer and cache errors are now supported.
Such exceptions now triggers a panic, giving more information about how
and when it happened.
2020-12-31 15:46:17 +08:00
Marius Vikhammer
f54e9269f3
esp_system: Don't compile sleep_mode.c on c3
2020-12-31 15:20:05 +11:00
Marius Vikhammer
68608f804c
esp32c3: Misc fixes needed to build & run
2020-12-31 15:20:05 +11:00
Marius Vikhammer
1b6891c5d8
mbedtls: merge changes from C3
2020-12-29 10:56:13 +08:00
Michael (XIAO Xufeng)
d5e1f43175
Merge branch 'feature/support_ext_flash_c3' into 'master'
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esp_flash: support external flash on C3
Closes IDF-2123
See merge request espressif/esp-idf!11648
2020-12-24 10:30:20 +08:00
Angus Gratton
04c681443e
hal esp32c3: Add placeholder rtc_io_ll.h
2020-12-23 09:53:24 +11:00
Armando
2d37bfa126
driver: Add adc_digi single conversion mode
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- add lock for single read and continuous read APIs
- update onetime read start singal delay for hardware limitation[*]
- move adc_caps to soc_caps.h
- update license dates
[*] There is a hardware limitation. If the APB clock frequency is high, the
step of this reg signal: ``onetime_start`` may not be captured by the
ADC digital controller (when its clock frequency is too slow). A rough
estimate for this step should be at least 3 ADC digital controller
clock cycle.
2020-12-23 09:53:24 +11:00
Angus Gratton
75dede2344
esp_hw_support: Add esp32c3 regi2c headers
2020-12-23 09:53:24 +11:00
Angus Gratton
f09b8ae7a4
driver: Add esp32c3 ADC driver
...
Based on internal commit 3ef01301fffa552d4be6d81bc9d199c223224305
2020-12-23 09:53:24 +11:00
Angus Gratton
27a9cf861e
driver: Add esp32c3 drivers (except ADC/DAC) and update tests
...
Some ESP32-C3 drivers are still pending.
Based on internal commit 3ef01301fffa552d4be6d81bc9d199c223224305
2020-12-23 09:53:24 +11:00
Michael (XIAO Xufeng)
7f3e61cf63
esp_flash: add support for external flash on C3
2020-12-22 13:31:04 +08:00
Marius Vikhammer
457ce080ae
AES: refactor and add HAL layer
...
Refactor the AES driver and add HAL, LL and caps.
Add better support for running AES-GCM fully in hardware.
2020-12-10 09:04:47 +00:00
Michael (XIAO Xufeng)
04d6b115ae
adc: fixed efuse called in critical section issue
2020-12-08 17:41:49 +08:00
Armando
d393699ab6
uart: bringup on esp32c3
2020-11-30 15:23:15 +11:00
Angus Gratton
7c08be5771
hal: Add initial ESP32-C3 support
...
From internal commit 7761d6e8
2020-11-30 15:23:15 +11:00
