A new method of workaround an error with DPORT is to ensure that the APB is read and followed by the DPORT register without interruptions and pauses. This fix places this implementation in the IRAM to exclude errors associated with the cache miss.
When two CPUs read the area of the DPORT and the area of the APB, the result is corrupted for the CPU that read the APB area.
And another CPU has valid data.
The method of eliminating this error.
Before reading the registers of the DPORT, make a preliminary reading of the APB register.
In this case, the joint access of the two CPUs to the registers of the APB and the DPORT is successful.
If scheduler switches cores in narrow window during esp_dport_access_stall_other_cpu_start(), could cause the stall
interrupt to occur on the running CPU - halting the CPU until WDT cleans up.
Related to https://github.com/espressif/esp-idf/issues/630
Implements support for system level traces compatible with SEGGER
SystemView tool on top of ESP32 application tracing module.
That kind of traces can help to analyse program's behaviour.
SystemView can show timeline of tasks/ISRs execution, context switches,
statistics related to the CPUs' load distribution etc.
Also this commit adds useful feature to ESP32 application tracing module:
- Trace data buffering is implemented to handle temporary peaks of events load
DPORT access protection can not work when the other CPU is stalled.
Writes to DPORT registers in esp_restart caused the program to hang due
to access protection, and the reset happened due to RTC_WDT, not SW_RST.
This change adds esp_dport_access_int_deinit function and calls it from
esp_restart once the other core is stalled.
1. When dual core cpu run access DPORT register, must do protection.
2. If access DPORT register, must use DPORT_REG_READ/DPORT_REG_WRITE and DPORT_XXX register operation macro.
