Commit Graph

226 Commits

Author SHA1 Message Date
Sudeep Mohanty
3088bebc23 fix(ulp_riscv): Fixed the header inclusion dependency for ulp_riscv_register_ops.h
There are redefinition compilation warnings for the register operation
macros when a ULP program was compiled which included soc.h before
ulp_riscv_register_ops.h. This commit fixes the issues by delegating the
exclusion macro to the CMakeLists.txt file.

Closes: https://github.com/espressif/esp-idf/issues/12116
Closes: https://github.com/espressif/esp-idf/issues/14438
2024-09-11 11:25:31 +02:00
Sudeep Mohanty
23bf06b231 fix(lp-i2c): Fixed the generation of spurious I2C start with lp-i2c
This commit fixes an issue with LP I2C and RTC I2C where in the
peripherals generated a spurious I2C start condition when initialized.
This caused some sensors to not respond properly to the following read
or write request.

Closes https://github.com/espressif/esp-idf/issues/14043
Closes https://github.com/espressif/esp-idf/issues/11608
2024-07-12 17:29:35 +02:00
Sudeep Mohanty
0a0327dce8 fix(ulp-risc-v): Fixed RTC I2C multi-byte read/write issue for ULP RISC-V
This commit fixes an issue where multi-byte reads and writes over the
RTC I2C peripheral got stuck on the esp32s2 and esp32s3.

Closes https://github.com/espressif/esp-idf/issues/12235
2024-06-24 17:11:02 +02:00
LonerDan
cd7b8f2db1 fix(ulp-risc-v): Set RTC GPIO output mode in the correct register for ULP RISC-V
According to the ESP32-S2/S3 TRM, the output pin's mode is set in the RTC_GPIO_PINn_REG
by programming the RTC_GPIO_PINn_PAD_DRIVER bit. The current ULP RISC-V RTCIO driver
however, incorrectly programs the RTC_IO_TOUCH_PADn_REG register field RTC_IO_TOUCH_PADn_DRV.
This commit fixes the bug.
2024-06-19 09:02:23 +02:00
Marius Vikhammer
d7649cbc4d change(ulp): added test for ulp adc init/deinit 2024-03-12 10:52:06 +08:00
paul
39a5f73a75 fix(ulp_adc): Provide ulp_adc_deinit() API to fix ADC1 handle leakage 2024-03-12 10:52:06 +08:00
Marius Vikhammer
b80a694abe Merge branch 'bugfix/rtc_i2c_not_in_od_mode_v5.1' into 'release/v5.1'
fix(ulp_riscv): Updated RTC I2C to use open-drain IOs (v5.1)

See merge request espressif/esp-idf!28932
2024-02-27 18:16:08 +08:00
Sudeep Mohanty
746b8bf98f fix(ulp_riscv): Updated RTC I2C to use open-drain IOs
This commit updates the RTC I2C driver in the ULP RISC-V to initialize
all I2C IOs in open-drain mode.
2024-02-06 08:42:12 +01:00
Sudeep Mohanty
300cd0c34f fix(lp_i2c): Fixed an issue where the LP_I2C IO lines were not in open-drain mode
This commit fixes an issue where in the LP I2C IO lines were not
initialized in open-drain mode.

Closes https://github.com/espressif/esp-idf/issues/12969
2024-01-29 09:48:39 +01:00
wuzhenghui
53afab3850
feat(ulp): add api to get lp_cpu wakeup cause and clear wakeup source at startup
Closes https://github.com/espressif/esp-idf/issues/12651
2023-12-28 13:31:55 +08:00
wuzhenghui
4e73c23e98 ci(ulp_test): fix fake sleep of the maincore in ulp pytest cases 2023-11-16 11:49:40 +08:00
Marius Vikhammer
c7532e27fa fix(ulp-i2c): fixed ulp i2c not working from main cpu if compiled with 0S or O2
Compiler would optimize register write to use s8i which do not work for IO registers

Closes https://github.com/espressif/esp-idf/issues/12214
2023-09-13 11:47:36 +08:00
Sudeep Mohanty
6b1292284e fix(lp_i2c): Fixed a bug where the LP_I2C did not send NACK for 16-byte reads
This commit updates the LP_I2C driver used by the LP CPU wherein the
driver did not send out a NACK when we do a read of multiple of the FIFO
depth bytes. This was because the LP I2C controller was configured to
send an ACK when the Rx FIFO reaches the threshold instead of a NACK.
This commit updates the behavior.
2023-08-11 14:43:15 +00:00
Sudeep Mohanty
a9ef76b031 fix(lp_i2c): Fixed a bug where LP I2C write got stuck
This commit fixes a bug where an I2C write got stuck when using the
lp_core_i2c_master_write_read_device() API. This was because the LP I2C
HW was not programmed with an END condition and therefore did not know
the end of a transaction.

Closes: https://github.com/espressif/esp-idf/issues/11958
2023-08-11 14:43:15 +00:00
Sudeep Mohanty
ee8adce5ea fix(lp_i2c): Fixed incorrect clock setting for LP_I2C
The LP_I2C clock setting was incorrect and a lower frequency value was
being set during initialization. This commit fixes the behavior.
2023-08-11 14:43:15 +00:00
Armando
dd9bcef9ea refactor(adc): maintain s_adc_tsen_enabled in adc driver 2023-07-12 16:35:51 +08:00
Jiang Jiang Jian
0cf0757224 Merge branch 'bugfix/ulp_fsm_ci_v5.1' into 'release/v5.1'
ulp-system/ulp-fsm: clean up test cases (v5.1)

See merge request espressif/esp-idf!24070
2023-07-11 01:46:39 +08:00
Marius Vikhammer
ee91a42a33 ulp-system/ulp-fsm: clean up test cases 2023-07-04 02:59:15 +00:00
boarchuz
e707ad166d fix ULP FSM reg ops with addr > 0xFF 2023-06-15 14:00:45 +02:00
Sudeep Mohanty
267c5e37a2 lp-i2c: Added support for LP I2C peripheral to LP core
This commit adds support for the LP I2C peripheral driver to be used by
the LP core. An example is also added to demonstrate the usage of the LP
I2C peripheral from the LP core.
2023-05-19 07:33:01 +02:00
Jakob Hasse
a6cbf68991 compiler: replaced noreturn by __noreturn__ in header files
* noreturn may be replaced by third-party macros,
  rendering it ineffective

* Closes https://github.com/espressif/esp-idf/issues/11339
2023-05-18 12:49:40 +08:00
Marius Vikhammer
d17ab36645 Merge branch 'feature/c6_ulp_timer_v5.1' into 'release/v5.1'
ulp: lp timer support for lp core (v5.1)

See merge request espressif/esp-idf!23659
2023-05-16 09:19:56 +08:00
Marius Vikhammer
45fd8feba3 ulp: add support for using lp timer with lp core on C6 2023-05-10 09:39:24 +08:00
Sudeep Mohanty
08600cb1a3 ulp-riscv-i2c: Add ULP RISC-V I2C read/write timeout config option
The commit 88e4c06028 introduced a loop timeout for all ULP RISC-V I2C
transactions to avoid getting stuck in a forever loop. The loop timeout
was set to 500 msec by default. This commit improves on the concept by
making the loop timeout configurable via a Kconfig option in terms of
CPU ticks. If the timeout is set to -1 value then the transaction loops
will never timeout, therefore restoring the driver behavior before the
timeout was introduced.

The commit also updates the I2C Fast mode timings for esp32s2 which need
to be adjusted due to bus timing constraints.

Closes https://github.com/espressif/esp-idf/issues/11154
2023-05-09 15:07:50 +02:00
Marius Vikhammer
94d6614c88 Merge branch 'ci/fix_overwrite_pytest_configs_v5.1' into 'release/v5.1'
ci: fixed test apps overriding pytest configs (v5.1)

See merge request espressif/esp-idf!23495
2023-05-06 17:40:58 +08:00
Marius Vikhammer
3724bf6256 ci: fixed test apps overriding pytest configs 2023-04-27 14:29:06 +08:00
Marius Vikhammer
0bac174058 ulp: added sleep support for lp core
Added support for running LP core while hp core sleeps, as well
as waking up the hp core.
2023-04-27 09:51:41 +08:00
Sudeep Mohanty
88e4c06028 ulp-riscv-i2c: Updated ULP RISC-V I2C driver to abort when met with errors
The current ULP RISC-V RTC I2C driver got stuck in an infinite loop if
there is a I2C transaction error. This commit amends the driver flow to
abort the read/write operation if met with errors. It also adds a loop
timeout to avoid getting stuck in an infinite loop.The commit also
updates the default bus timing parameters for RTC I2C to be faster.
This commit also adds documentation help to guide users when they meet
with issues while working with the RTC I2C driver on the ULP RISC-V coprocessor.
2023-03-29 13:25:46 +02:00
Marius Vikhammer
b7fcf1c139 ulp-fsm: fixed potential sleep tests failures
If the ULP sent the wake-up signal before the main CPU went to sleep,
then the test case would get stuck in sleep.

Increased delay before sending the wake-up signal.
2023-03-22 11:39:33 +08:00
Zim Kalinowski
5016eb6269 ulp: fix and re-enable no-format warnings 2023-03-12 21:47:24 +01:00
Marius Vikhammer
284dabf17f ulp: added basic support for building and running a binary in the lp core 2023-03-09 10:12:23 +08:00
Sudeep Mohanty
a67d15fdea ulp: Added APIs to handle ULP signal ISRs for the main CPU
This commit introduces APIs to handle ULP signal ISRs when the main core
is not in sleepmode.

Closes https://github.com/espressif/esp-idf/issues/10737
2023-02-24 07:25:39 +00:00
Alexey Lapshin
61a7342acd tools: add riscv zicsr/zifencei because they were separated from i
https://groups.google.com/a/groups.riscv.org/g/sw-dev/c/aE1ZeHHCYf4
2023-02-22 05:33:03 +00:00
Alexey Lapshin
5389ac4e04 tools: cmake: ignore linker RWX segment warnings 2023-02-22 05:33:03 +00:00
Sudeep Mohanty
522a216385 Merge branch 'feature/ulp_elf_output' into 'master'
ulp: Updated ULP CMakeLists.txt to output binary with .elf extension

Closes IDF-3060

See merge request espressif/esp-idf!22414
2023-02-20 15:08:35 +08:00
Sudeep Mohanty
8f93e4d0d5 ulp: Updated ULP CMakeLists.txt to output binary with .elf extension
This commit updates the ULP CMakeLists.txt to output the ULP binary with
a .elf extension. Currently the output file does not use any extension.
2023-02-17 10:44:24 +01:00
Omar Chebib
5e5343d429 TWDT: Use the new TWDT Kconfig options in the examples and tests 2023-02-17 11:22:25 +08:00
Sudeep Mohanty
3cc399f399 ulp-riscv: Added API ulp_riscv_reset to reset the ULP core
This commit adds a new API ulp_reisv_reset() to enable reseting of the
ULP core from the main core. This is particularly necessary in case the
ULP crashes due to any reason. Earlier the only way to recover the ULP
was to do a power reset. This commit also adds new test cases which
exercise this scenario.
2023-02-08 07:52:34 +00:00
Marius Vikhammer
8aaecb9b28 ulp-riscv: add more wakeup test cases 2023-01-17 16:41:48 +08:00
Sudeep Mohanty
28ccb3b414 Merge branch 'bugfix/rtc_i2c_stuck_after_esp_restart' into 'master'
ulp risc-v rtc i2c: Fix a bug where RTC I2C failed to initialize after esp_restart()

Closes IDFGH-9065

See merge request espressif/esp-idf!21862
2023-01-05 15:59:08 +08:00
Sudeep Mohanty
2df00a4b17 Merge branch 'docs/ulp_riscv_i2c_sub_reg_addr' into 'master'
ulp-riscv-i2c: Updated API documentation about sub register address usage

Closes IDFGH-9023

See merge request espressif/esp-idf!21838
2023-01-05 15:58:29 +08:00
Sudeep Mohanty
4a410391cc ulp risc-v rtc i2c: Fix a bug where RTC I2C failed to initialize after esp_restart()
This commit fixes a bug wherein the RTC I2C peripheral got stuck after
the main CPU performs a soft reset by using esp_restart(). This is
because the RTC domain config registers for the RTC I2C domain are not
cleared after the soft restart and hence need to be cleared manually
while initializing the RTC I2C peripheral again.

Closes https://github.com/espressif/esp-idf/issues/10468
2023-01-02 15:44:03 +01:00
Sudeep Mohanty
07a506bb02 ulp-riscv-i2c: Updated API documentation about sub register address usage
The RTC I2C peripheral always expects a I2C slave sub register address
to be programmed. If it is not programmed then a sub register address
available in SENS_SAR_I2C_CTRL_REG[18:11] is used for I2C read/write.
This commit updates the documentation of the API
ulp_riscv_i2c_master_set_slave_reg_addr() to clarify the same.
2022-12-29 09:58:24 +01:00
Sudeep Mohanty
099f648686 ulp-riscv: ULP RISC-V I2C example gets stuck on esp32s2
This commit fixes an issue where in the ULP RISC-V I2C example causes
a spurious wakeup of the main CPU because of a Trap signal when the ULP
core does not meet the wakeup threshold values. This was due to the fact
that the RTC_CNTL_COCPU_DONE signal was being set before the
RTC_CNTL_COCPU_SHUT_RESET_EN signal which was causing the the ULP RISC-V
core to not reset properly on each cycle.

Closes https://github.com/espressif/esp-idf/issues/10301
2022-12-27 07:44:26 +00:00
KonstantinKondrashov
9fd8f3786a all: Replaces memset/memcpy with hal_mem.. funcs where were used -Wstringop-overread, -Wstringop-overflow, -Warray-bounds
hal: Adds hal_memcpy and hal_memset
2022-11-30 19:22:41 +08:00
Marius Vikhammer
4a56758547 Merge branch 'bugfix/s3_ulp_riscv_cocpu_trap' into 'master'
ulp-riscv: always force COCPU clock on S3

Closes FCS-983

See merge request espressif/esp-idf!20632
2022-10-25 13:50:36 +08:00
Marius Vikhammer
7b5bdcf077 ulp-riscv: always force COCPU clock on S3
The coprocessor cpu trap signal doesnt have a stable reset value,
force ULP-RISC-V clock on to stop RTC_COCPU_TRAP_TRIG_EN from waking the CPU
2022-10-18 03:06:05 +00:00
Marius Vikhammer
23b5e54974 CI: add common debug helper sdkconfig that can be used in test apps 2022-10-12 11:47:04 +08:00
Sudeep Mohanty
93153bdfe1 ulp: add all 'ignore' tests to pytest framework
This commit adds a way to run all 'ignore' tests for ulp using the
pytest framework.
2022-10-06 12:58:11 +02:00
Alexey Lapshin
e6f7b1a3a0 tools: cmake: check tool supported version with idf_tools.py 2022-10-03 19:01:32 +04:00