fix(ulp_riscv): Fixed the header inclusion dependency for ulp_riscv_register_ops.h

There are redefinition compilation warnings for the register operation
macros when a ULP program was compiled which included soc.h before
ulp_riscv_register_ops.h. This commit fixes the issues by delegating the
exclusion macro to the CMakeLists.txt file.

Closes: https://github.com/espressif/esp-idf/issues/12116
Closes: https://github.com/espressif/esp-idf/issues/14438
This commit is contained in:
Sudeep Mohanty 2023-08-28 17:39:48 +08:00
parent 494cce05a9
commit 3088bebc23
4 changed files with 3 additions and 3 deletions

View File

@ -75,6 +75,7 @@ if(ULP_COCPU_IS_RISCV)
target_link_options(${ULP_APP_NAME} PRIVATE SHELL:-T ${IDF_PATH}/components/ulp/ld/${IDF_TARGET}.peripherals.ld)
target_link_options(${ULP_APP_NAME} PRIVATE "-Wl,--no-warn-rwx-segments")
target_compile_definitions(${ULP_APP_NAME} PRIVATE IS_ULP_COCPU)
target_compile_definitions(${ULP_APP_NAME} PRIVATE ULP_RISCV_REGISTER_OPS)
elseif(ULP_COCPU_IS_LP_CORE)
list(APPEND ULP_S_SOURCES

View File

@ -6,6 +6,7 @@
#pragma once
#include "ulp_riscv_register_ops.h"
#include "hal/adc_ll.h"
#ifdef __cplusplus

View File

@ -12,7 +12,7 @@ extern "C" {
#include "soc/rtc_io_reg.h"
#include "soc/sens_reg.h"
#include "ulp_riscv_register_ops.h"
typedef enum {
GPIO_NUM_0 = 0, /*!< GPIO0, input and output */

View File

@ -5,13 +5,11 @@
*/
#pragma once
#define ULP_RISCV_REGISTER_OPS
#ifdef __cplusplus
extern "C" {
#endif
//Registers Operation {{
/*