Commit Graph

43 Commits

Author SHA1 Message Date
laokaiyao
cf049e15ed esp8684: rename target to esp32c2 2022-01-19 11:08:57 +08:00
Cao Sen Miao
3a4db97cec spi_flash: move patch files to common rom patch folder 2021-12-30 14:05:12 +08:00
Cao Sen Miao
3dd1cfea18 spi_flash: refactor spi_flash.h to decline duplicated code 2021-12-30 14:05:12 +08:00
Cao Sen Miao
3934e24d22 ESP8684: add spi_flash, efuse, hw_support support 2021-11-06 17:33:44 +08:00
Armando
c331c85318 mspi: make cpu clock source switch safe
For some of the MSPI high frequency setting (e.g. 80M DDR mode Flash or PSRAM), timing tuning is required.
Certain delays will be added to the MSPI RX direction. When system clock switches down, the delays should be
cleared. When system clock switches up, the delays should be restored.
2021-10-19 21:47:27 +08:00
Armando
2655a506c9 mspi: support auto detect octal flash vendor 2021-10-08 15:59:57 +08:00
Cao Sen Miao
6c0aebe279 esp_flash: add opi flash support in esp_flash chip driver, for MXIC 2021-09-07 14:44:40 +08:00
Cao Sen Miao
559c1ac3f9 esp_flash: add support mxic as a main flash under spi mode 2021-09-05 00:33:28 +08:00
Armando
d325f4d557 mspi: support octal flash 120M STR mode on esp32s3 2021-08-19 10:44:30 +08:00
Shu Chen
6fce2930d0 esp32h2: enable more components to support esp32h2
Involved components:
 * app_trace
 * esp-tls
 * esp_adc_cal
 * esp_pm
 * esp_serial_slave_link
 * esp_timer
 * freertos
 * idf_test
 * log
 * mbedtls
 * newlib
 * perfmon
 * spi_flash
 * spiffs
 * ulp
 * unity
 * vfs
2021-07-01 19:53:11 +08:00
Cao Sen Miao
08f1bbe0c7 spi_flash: fix cs line setup to make the flash driver more stable 2021-06-01 16:41:41 +08:00
Michael (XIAO Xufeng)
8cfcf6da7a Merge branch 'bugfix/enable_gpio18_gpio19_esp32c3' into 'master'
gpio: Disable USB JTAG when setting pins 18 and 19 as GPIOs on ESP32C3

Closes IDF-2964

See merge request espressif/esp-idf!12753
2021-04-12 09:39:55 +00:00
Omar Chebib
cd79f3907d gpio: Disable USB JTAG when setting pins 18 and 19 as GPIOs on ESP32C3
When `DIS_USB_JTAG` eFuse is NOT burned (`False`), it is not possible
to set pins 18 and 19 as GPIOs. This commit solves this by manually
disabling USB JTAG when using pins 18 or 19.
The functions shall use `gpio_hal_iomux_func_sel` instead of
`PIN_FUNC_SELELECT`.
2021-04-08 14:01:18 +08:00
Armando
9b9ea71ff9 spi: remove HSPI macro on esp32c3 and esp32s3 2021-04-06 13:42:49 +08:00
Cao Sen Miao
9905da46e0 spi_flash: Add auto suspend mode on esp32c3 2021-01-25 11:14:02 +08:00
KonstantinKondrashov
1f37a5f162 spi_flash(esp32-s2): Add the workaround of a reboot issue when SPI HW suspend is enabled 2021-01-25 11:13:38 +08:00
KonstantinKondrashov
60e58eaddb spi_flash: Add auto-suspend mode for ESP32-S2
Uses HW auto_wait_idle, HW auto_suspend and SW resume
2021-01-25 11:13:38 +08:00
Michael (XIAO Xufeng)
7f3e61cf63 esp_flash: add support for external flash on C3 2020-12-22 13:31:04 +08:00
Angus Gratton
06ec032c0c spi_flash: Simplify init-time size check 2020-12-17 15:34:13 +11:00
Angus Gratton
d4c9a45675 spi_flash: Add ESP32-C3 support
Based on internal commit 3ef01301fff
2020-12-17 15:34:13 +11:00
Angus Gratton
5228d9f9ce esp32c3: Apply one-liner/small changes for ESP32-C3 2020-12-01 10:58:50 +11:00
Michael (XIAO Xufeng)
3bacf35310 esp_flash: support high capacity flash chips (32-bit address) 2020-10-29 18:20:11 +08:00
morris
61f89b97c6 bringup esp32-s3 on FPGA 2020-09-22 15:15:03 +08:00
Michael (XIAO Xufeng)
c7b1436485 esp_flash: fix cs_initialize issue on esp32s2 2020-07-27 12:27:05 +08:00
Angus Gratton
e04eacbe3f Merge branch 'refactor/common_rom_efuse_apis' into 'master'
esp_rom: extract common efuse apis into esp_rom_efuse.h

See merge request espressif/esp-idf!9267
2020-07-17 15:57:28 +08:00
morris
458b14a8ea esp_rom: extract common efuse apis into esp_rom_efuse.h 2020-07-15 10:40:50 +08:00
Michael (XIAO Xufeng)
c796bd5e63 esp_flash: refactor to make host driver function a const table
This is also part of ESP32-S3 ROM changes
2020-07-13 03:10:00 +08:00
morris
a4d0033c03 esp_rom: extract common GPIO apis into esp_rom_gpio.h 2020-07-07 11:40:19 +08:00
Michael (XIAO Xufeng)
dae3196157 esp_flash: fix issue that cannot add flash on SPI1 CS1 when SPI_FLASH_SHARE_SPI1_BUS is disabled 2020-05-17 22:06:00 +08:00
michael
fdf983e0c4 spi: fix config break and reduce overhead of the bus lock on SPI1
The SPI bus lock on SPI1 introduces two side effects:

1. The device lock for the main flash requires the
`CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION` to be selected, however this
option is disabled by default in earlier IDF versions. Some developers
may find their project cannot be built by their old sdkconfig files.

2. Usually we don't need the lock on the SPI1 bus, due to it's
restrictions. However the overhead still exists in this case, the IRAM
cost for static version of semaphore functions, and the time cost when
getting and releasing the lock.

This commit:

1. Add a CONFIG_SPI_FLASH_BYPASS_MAIN_LOCK option, which will forbid the
space cost, as well as the initialization of the main bus lock.

2. When the option is not selected, the bus lock is used, the
`CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION` will be selected explicitly.

3. Revert default value of `CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION`
to `n`.

introduced in 49a48644e4.

Closes https://github.com/espressif/esp-idf/issues/5046
2020-04-22 16:06:13 +08:00
Michael (XIAO Xufeng)
9d9d22c920 esp_flash: deprecate the cs_id member, which is no longer used.
We used to manually specify the CS id. However after the SPI bus lock is
introduced, the lock is responsible to assign the CS lines and provide
the CS id. The esp_flash driver now depends on the ID assigned by the
SPI bus lock, the configuration field is deprecated.
2020-04-17 18:15:33 +08:00
Michael (XIAO Xufeng)
5404e3d434 esp_flash: fix cache exception when CS pin is through IOMUX 2020-04-17 18:15:33 +08:00
Michael (XIAO Xufeng)
11501dbaa9 esp_flash: fix the cleanup when add device fails 2020-04-17 18:15:32 +08:00
Michael (XIAO Xufeng)
49a48644e4 spi: allow using esp_flash and spi_master driver on the same bus 2020-03-26 22:08:26 +08:00
morris
e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00
Wangjialin
d4e5980823 flash: fix 80Mhz for new spi flash driver on esp32s2 2020-01-16 17:43:59 +08:00
Renz Christian Bagaporo
e6ad330018 ble_mesh_wifi_coexist example: Disable Wi-Fi RX IRAM optimisation
Otherwise IRAM usage is too high in this example.
2019-11-28 09:20:00 +08:00
Michael (XIAO Xufeng)
571864e8ae esp_flash: fix set qe bit and write command issues
There used to be dummy phase before out phase in common command
transactions. This corrupts the data.

The code before never actually operate (clear) the QE bit, once it finds
the QE bit is set. It's hard to check whether the QE set/disable
functions work well.

This commit:

1. Cancel the dummy phase

2. Set and clear the QE bit according to chip settings, allowing tests
   for QE bits. However for some chips (Winbond for example), it's not
   forced to clear the QE bit if not able to.

3. Also refactor to allow chip_generic and other chips to share the same
   code to read and write qe bit; let common command and read command share
   configure_host_io_mode.

4. Rename read mode to io mode since maybe we will write data with quad
   mode one day.
2019-10-14 17:25:58 +08:00
Michael (XIAO Xufeng)
afbe1ba878 spi: move deprecated functions into internal header
Resolves https://github.com/espressif/esp-idf/issues/4132
2019-10-08 11:51:39 +08:00
Michael (XIAO Xufeng)
511820820e esp_flash: fix the coredump issue
During coredump, dangerous-area-checking should be disabled, and cache
disabling should be replaced by a safer version.

Dangerous-area-checking used to be in the HAL, but it seems to be more
fit to os functions. So it's moved to os functions. Interfaces are
provided to switch between os functions during coredump.
2019-09-14 17:01:36 +08:00
Michael (XIAO Xufeng)
6139864a4c esp_flash: fix coredump for legacy spi flash API
When legacy mode is used, the coredump still fails during linking
because "esp_flash_init_default_chip", "esp_flash_app_init" and
"esp_flash_default_chip " are not compiled and linked.

Instead of using ``if`` macros in callers, these functions are protected
by ``if`` macros in the header, and also not compiled in the sources.
"esp_flash_default_chip" variable is compiled with safe default value.
2019-09-14 16:56:31 +08:00
Anton Maklakov
afbaf74007 tools: Mass fixing of empty prototypes (for -Wstrict-prototypes) 2019-08-01 16:28:56 +07:00
Michael (XIAO Xufeng)
d6bd24ca67 esp_flash: add initialization interface for SPI devices 2019-06-27 13:27:27 +08:00