Commit Graph

127 Commits

Author SHA1 Message Date
Cao Sen Miao
a690a87829 spi_flash: Remove legacy spi_flash drivers 2022-07-01 11:01:34 +08:00
Darian Leung
546a7fc495 esp_pm: Disable esp_pm when SMP FreeRTOS is enabled
SMP FreeRTOS currently does not support power management yet. This
commit makes SMP FreeRTOS and esp_pm mutually exclusive.
2022-06-15 16:17:59 +08:00
Mahavir Jain
a5fe7bb281
tools/unit_test_app: add targets specific configs for "aes_no_hw"
In ESP32-C2, there is no hardware AES and hence this config is not required
2022-06-10 15:08:07 +05:30
Michael (XIAO Xufeng)
773715d900 Merge branch 'feature/support_refresh_brownout_v1' into 'master'
spi_flash: send reset when brownout detected on XMC flash

Closes IDF-3882

See merge request espressif/esp-idf!16873
2022-06-06 16:27:58 +08:00
morris
aa3ddbc3c6 Merge branch 'test/enable_c2_target_tests' into 'master'
ci: enable target tests for ESP32-C2

Closes IDF-4989

See merge request espressif/esp-idf!18182
2022-06-03 16:41:24 +08:00
Anton Maklakov
ad4b3bc8b3 ci, config: re-arrange some C3 tests due to code size changes from 2022r1 toolchain 2022-06-02 10:15:23 +07:00
Michael (XIAO Xufeng)
acd4ca0f6e ci: add ut configs for ESP32-C2
note: flash encryption ut is not enabled in this commit, see IDF-5056
2022-06-02 11:10:29 +08:00
Cao Sen Miao
890f046ee9 test: split a new banch of testing to save IRAM 2022-06-02 10:38:55 +08:00
Marius Vikhammer
0687daf2c8 kconfig: move remaining kconfig options out of target component
The kconfig options are moved to the component where they are used,
mostly esp_hw_support and esp_system.
2022-05-23 17:57:45 +08:00
Darian Leung
8c88c6f68f freertos: Update task snapshot unit tests
This commit updates the task snapshot unit tests as follows:

- Both uxTaskGetSnapshotAll() and vTaskGetSnapshot() are now both tested
- Test cases are now dependent on CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT
2022-04-01 22:01:16 +08:00
Jakob Hasse
2c3ff999ac Merge branch 'feature/cxx_tests_pytest_embedded' into 'master'
C++: change cxx unit tests to component unit tests

Closes IDF-4807

See merge request espressif/esp-idf!17554
2022-03-28 11:45:20 +08:00
Jakob Hasse
9e25e0ed4b refactor (cxx): changed cxx unit tests to component unit tests 2022-03-25 12:14:02 +08:00
Marius Vikhammer
0fbae992dd config: removed references to non-existing kconfig options 2022-03-15 18:32:22 +08:00
Laukik Hase
7c6d343a60 ci: Add unit test configs for aggressive SPIRAM allocations
- CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=0
  Everything will be allocated from the SPIRAM
  (except DMA and FreeRTOS task resources)
- CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY=y
  Allow external memory as an argument to xTaskCreateStatic
- CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL=default
  Reserved memory for crucial internal functions (DMA, FreeRTOS)
- Increase parallel job count
2022-03-10 05:01:17 +00:00
Marius Vikhammer
374712921a CI: add configs for running S2, S3 unit tests with PSRAM
Fixed various minor failures detected with these configs.
2022-03-04 15:29:17 +08:00
Marius Vikhammer
06d8a5bf33 Merge branch 'bugfix/inline_intrmask_from_isr' into 'master'
freertos: always inline xPortSetInterruptMaskFromISR and vPortClearInterruptMaskFromISR

Closes IDFGH-6669

See merge request espressif/esp-idf!16970
2022-02-23 01:05:40 +00:00
Marius Vikhammer
ae31146b0b CI: increase IPC stack size for test_utils configs 2022-02-22 10:42:34 +08:00
Marius Vikhammer
8220b2bb34 freertos: always inline xPortSetInterruptMaskFromISR and vPortClearInterruptMaskFromISR
These were called from IRAM context where the caller expect them to be inlined
and accessible when cache is disabled. This was not the case when compiled with -O0.

Closes https://github.com/espressif/esp-idf/issues/8301
2022-02-07 11:32:45 +08:00
Sudeep Mohanty
2fc9bd61bf ulp: refactor ulp component
This commit refactors the ulp component.
Files are now divided based on type of ulp, viz., fsm or risc-v.
Files common to both are maintained in the ulp_common folder.

This commit also adds menuconfig options for ULP within the ulp
component instead of presenting target specific configuations for ulp.
2022-01-27 11:54:42 +05:30
Armando
7240ad2b3a psram: refactor spiram.c on esp32s2 2022-01-13 11:07:57 +08:00
Mahavir Jain
397639da7d Merge branch 'feature/rsa_intr' into 'master'
MPI: add kconfig option for doing intr-based exp-mod operations

Closes IDF-4389

See merge request espressif/esp-idf!16558
2022-01-07 13:27:53 +00:00
Marius Vikhammer
ba3f12a9fe rsa: add generate RSA keys test case 2022-01-07 11:35:35 +08:00
Marius Vikhammer
7255497146 freertos: remove FREERTOS_ASSERT option
Freertos asserts are now configured the same way as all other asserts in IDF,
i.e. by configuring COMPILER_OPTIMIZATION_ASSERTION_LEVEL.
2022-01-07 09:16:48 +08:00
Marius Vikhammer
a9a7160cb6 MPI: add kconfig option for doing intr-based exp-mod operations 2021-12-29 18:55:48 +08:00
Tomas Rezucha
ebaca79557 other: Move cbor, jsmn and libsodium to idf-component-manager
Marginal components are being carved out from esp-idf and moved to
https://github.com/espressif/idf-extra-components.
They are distributed via idf-component-manager, see
https://components.espressif.com.
2021-11-30 21:44:48 +01:00
Ondrej Kosta
3a7a67f174 netif: added ESP-NETIF L2 TAP interface 2021-11-23 11:17:22 +01:00
morris
7b8d5562d2 Merge branch 'feature/support_sdspi_on_s2_c3' into 'master'
example: support sdspi on s2 c3

Closes IDF-1279

See merge request espressif/esp-idf!15107
2021-09-27 03:48:52 +00:00
SalimTerryLi
92e337a38c
sdspi: enable UT & ExampleTest for C3/S2
Closes https://github.com/espressif/esp-idf/issues/7389

(1)     "MMC_RSP_BITS" [sd]                                                             [Y]
(2)     "probe SD in SPI mode" [sd][test_env=UT_T1_SPIMODE]                             [Y]
(3)     "probe SD in SPI mode, slot 0" [sd][ignore]                                     [N]
(4)     "SDMMC performance (SPI mode)" [sdspi][test_env=UT_T1_SPIMODE]                  [Y]
(5)     "SDMMC test read/write with offset (SPI mode)" [sdspi][test_env=UT_T1_SPIMODE]  [Y]
(6)     "CD input works in SPI mode" [sd][test_env=UT_T1_SPIMODE]                       [Y]
(7)     "WP input works in SPI mode" [sd][test_env=UT_T1_SPIMODE]                       [Y]
2021-09-24 15:17:18 +08:00
KonstantinKondrashov
fce50ef9e3 unit-test-app/configs(esp32c3): CI sill uses ECO2 for flash_encryption tests 2021-09-24 13:59:42 +08:00
Wu Zheng Hui
3128a2544b Adjust the variable name &
Add mapping support for different sizes of spi ram
2021-08-25 16:06:28 +08:00
Konstantin Kondrashov
29f581fc70 freertos(esp32s3): SysTick uses systimer 2021-08-04 20:33:44 +08:00
Cao Sen Miao
247866261f Merge branch 'feature/flash_support_on_esp32s3' into 'master'
esp_flash: bringup ext flash chip on ESP32-S3

Closes IDF-2021 and IDF-3230

See merge request espressif/esp-idf!14523
2021-08-02 03:59:14 +00:00
Cao Sen Miao
992de2750e spi_flash: add support for ext flash 2021-07-31 14:11:35 +08:00
Armando
f2bfdec20f ci: enable external bss and external noinit test cases 2021-07-31 11:02:13 +08:00
Anton Maklakov
be8ef09a59 Merge branch 'feature/exception_emergency_pool_test_ci' into 'master'
[cxx]: Activate emergency exception memory pool test in CI

Closes IDF-1610

See merge request espressif/esp-idf!14143
2021-07-20 02:22:32 +00:00
Angus Gratton
f9d958a65d ut configs: Replace target component with esp_hw_support
No tests remaining in the target components.

Some further consolidations can be made here later, to combine target-specific
configs that don't need to be target-specific any more.
2021-07-16 20:14:28 +08:00
Marius Vikhammer
80acc1a002 CI: add S3 default_2 unit test config 2021-07-08 18:39:57 +08:00
Jakob Hasse
7edb808592 [cxx]: Activated emergency pool test to CI 2021-07-08 17:26:49 +08:00
Cao Sen Miao
ed16e9b5d6 spi_flash: enable unit-test for flash suspend 2021-04-15 12:05:40 +08:00
Angus Gratton
202154ff1c ut: Exclude test_utils component from default_2_c3 config
Theory is that the large alignments in this test component are triggering linker
bug (to be fixed in next toolchain update). This component is already tested
in a dedicated config, so it doesn't need to be included in this config.
2021-04-08 13:33:28 +10:00
Angus Gratton
3c9e9a7704 Merge branch 'bugfix/renable_unit_tests' into 'master'
ci: enable previously disabled unit tests

See merge request espressif/esp-idf!12582
2021-04-01 03:23:22 +00:00
Michael (XIAO Xufeng)
5db528cda1 Merge branch 'bugfix/remove_spi_flash_qio_s2_cfg' into 'master'
ci: remove spi_flash_qio_s2 config

See merge request espressif/esp-idf!12927
2021-03-30 03:00:34 +00:00
Marius Vikhammer
b4d2fb56a0 ci: enable previously disabled unit tests 2021-03-29 18:36:41 +08:00
Marius Vikhammer
b99c973d9f ci: remove spi_flash_qio_s2 config
This config is already run for all targets in spi_flash_qio config
2021-03-26 16:46:21 +08:00
Marius Vikhammer
d3d145285d flash enc: add flash encryption unit and example test for C3 2021-03-25 17:51:22 +08:00
KonstantinKondrashov
e29b99f1a5 libsodium: Enables UTs for ESP32-S2 & C3 2021-02-25 10:41:59 +00:00
Angus Gratton
fb1488abba Merge branch 'feature/esp_timer_isr_dispatch_method_restore' into 'master'
esp timer: Add ISR dispatch method

Closes IDF-1172 and IDF-1173

See merge request espressif/esp-idf!11572
2021-02-23 06:21:14 +00:00
Fu Hanxi
7db83b26da style(pre-commit): unrelated changes 2021-02-10 14:50:07 +08:00
KonstantinKondrashov
63d4911cdb esp_timer: Add ESP_TIMER_ISR dispatch method
Using own spinlock for each list (TASK and ISR disp method)
Reduced the dependency of ISR on the TASK dispatch method
2021-02-08 19:10:11 +08:00
Michael (XIAO Xufeng)
747ac00f9b Merge branch 'bugfix/flash_encyption_80Mflash_40Mram' into 'master'
flash_encryption/psram: fixed the issue that block when flash_encryption_write

See merge request espressif/esp-idf!12177
2021-02-05 22:00:26 +08:00