timer_hal_capture_and_get_counter_value
should be placed in the IRAM for speed optimization
because the default ISR handler is placed in the IRAM.
Closes https://github.com/espressif/esp-idf/issues/12021
If the TimerGroup 0 clock is disabled and then reenabled, the watchdog
registers (Flashboot protection included) will be re-enabled, and some
seconds later, will trigger an unintended reset.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
GPTimer on C6 supports RC_FAST as the clock source. The benefit of this
clock is that, the clock can sustain in light sleep.
Added a new API to return the real resolution of the timer handle.
