mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
driver: minor code clean up to pass coverity scan test
This commit is contained in:
parent
213504238f
commit
88600bd91b
@ -1730,7 +1730,7 @@ esp_err_t i2s_write_expand(i2s_port_t i2s_num, const void *src, size_t size, siz
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esp_err_t i2s_read(i2s_port_t i2s_num, void *dest, size_t size, size_t *bytes_read, TickType_t ticks_to_wait)
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{
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char *data_ptr;;
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char *data_ptr;
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char *dest_byte;
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int bytes_can_read;
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*bytes_read = 0;
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@ -65,11 +65,10 @@ static esp_err_t gptimer_register_to_group(gptimer_t *timer)
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portEXIT_CRITICAL(&group->spinlock);
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if (timer_id < 0) {
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gptimer_release_group_handle(group);
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group = NULL;
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} else {
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timer->timer_id = timer_id;
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timer->group = group;
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break;;
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break;
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}
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}
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ESP_RETURN_ON_FALSE(timer_id != -1, ESP_ERR_NOT_FOUND, TAG, "no free timer");
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@ -92,7 +92,6 @@ static esp_err_t parlio_tx_register_to_group(parlio_tx_unit_t *unit)
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if (unit_id < 0) {
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// didn't find a free unit slot in the group
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parlio_release_group_handle(group);
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group = NULL;
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} else {
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unit->unit_id = unit_id;
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unit->group = group;
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@ -477,6 +476,8 @@ esp_err_t parlio_tx_unit_enable(parlio_tx_unit_handle_t tx_unit)
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if (atomic_compare_exchange_strong(&tx_unit->fsm, &expected_fsm, PARLIO_TX_FSM_RUN_WAIT)) {
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// check if we need to start one transaction
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if (xQueueReceive(tx_unit->trans_queues[PARLIO_TX_QUEUE_PROGRESS], &t, 0) == pdTRUE) {
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// sanity check
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assert(t);
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atomic_store(&tx_unit->fsm, PARLIO_TX_FSM_RUN);
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parlio_tx_do_transaction(tx_unit, t);
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} else {
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@ -611,6 +612,8 @@ static void IRAM_ATTR parlio_tx_default_isr(void *args)
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expected_fsm = PARLIO_TX_FSM_ENABLE;
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if (atomic_compare_exchange_strong(&tx_unit->fsm, &expected_fsm, PARLIO_TX_FSM_RUN_WAIT)) {
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if (xQueueReceiveFromISR(tx_unit->trans_queues[PARLIO_TX_QUEUE_PROGRESS], &trans_desc, &high_task_woken) == pdTRUE) {
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// sanity check
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assert(trans_desc);
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atomic_store(&tx_unit->fsm, PARLIO_TX_FSM_RUN);
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parlio_tx_do_transaction(tx_unit, trans_desc);
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if (high_task_woken == pdTRUE) {
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@ -133,7 +133,6 @@ static esp_err_t pcnt_register_to_group(pcnt_unit_t *unit)
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portEXIT_CRITICAL(&group->spinlock);
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if (unit_id < 0) {
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pcnt_release_group_handle(group);
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group = NULL;
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} else {
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unit->group = group;
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unit->unit_id = unit_id;
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@ -133,7 +133,6 @@ static esp_err_t rmt_rx_register_to_group(rmt_rx_channel_t *rx_channel, const rm
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if (channel_id < 0) {
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// didn't find a capable channel in the group, don't forget to release the group handle
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rmt_release_group_handle(group);
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group = NULL;
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} else {
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rx_channel->base.channel_id = channel_id;
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rx_channel->base.channel_mask = channel_mask;
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@ -120,7 +120,6 @@ static esp_err_t rmt_tx_register_to_group(rmt_tx_channel_t *tx_channel, const rm
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if (channel_id < 0) {
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// didn't find a capable channel in the group, don't forget to release the group handle
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rmt_release_group_handle(group);
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group = NULL;
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} else {
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tx_channel->base.channel_id = channel_id;
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tx_channel->base.channel_mask = channel_mask;
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@ -29,10 +29,10 @@
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#define SDMMC_EVENT_QUEUE_LENGTH 32
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static void sdmmc_isr(void* arg);
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static void sdmmc_isr(void *arg);
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static void sdmmc_host_dma_init(void);
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static const char* TAG = "sdmmc_periph";
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static const char *TAG = "sdmmc_periph";
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static intr_handle_t s_intr_handle;
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static QueueHandle_t s_event_queue;
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static SemaphoreHandle_t s_io_intr_event;
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@ -56,7 +56,7 @@ static size_t s_slot_width[2] = {1, 1};
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* (for GPIO matrix).
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*/
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#ifdef SOC_SDMMC_USE_GPIO_MATRIX
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static void configure_pin_gpio_matrix(uint8_t gpio_num, uint8_t gpio_matrix_sig, gpio_mode_t mode, const char* name);
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static void configure_pin_gpio_matrix(uint8_t gpio_num, uint8_t gpio_matrix_sig, gpio_mode_t mode, const char *name);
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#define configure_pin(name, slot, mode) \
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configure_pin_gpio_matrix(s_sdmmc_slot_gpio_num[slot].name, sdmmc_slot_gpio_sig[slot].name, mode, #name)
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static sdmmc_slot_io_info_t s_sdmmc_slot_gpio_num[SOC_SDMMC_NUM_SLOTS];
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@ -197,7 +197,7 @@ static esp_err_t sdmmc_host_clock_update_command(int slot)
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.wait_complete = 1
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};
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bool repeat = true;
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while(repeat) {
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while (repeat) {
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ESP_RETURN_ON_ERROR(sdmmc_host_start_command(slot, cmd_val, 0), TAG, "sdmmc_host_start_command returned 0x%x", err_rc_);
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@ -339,7 +339,7 @@ esp_err_t sdmmc_host_set_card_clk(int slot, uint32_t freq_khz)
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return ESP_OK;
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}
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esp_err_t sdmmc_host_get_real_freq(int slot, int* real_freq_khz)
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esp_err_t sdmmc_host_get_real_freq(int slot, int *real_freq_khz)
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{
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if (real_freq_khz == NULL) {
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return ESP_ERR_INVALID_ARG;
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@ -366,7 +366,8 @@ esp_err_t sdmmc_host_set_input_delay(int slot, sdmmc_delay_phase_t delay_phase)
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ESP_RETURN_ON_FALSE(delay_phase < SOC_SDMMC_DELAY_PHASE_NUM, ESP_ERR_INVALID_ARG, TAG, "invalid delay phase");
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uint32_t clk_src_freq_hz = 0;
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esp_clk_tree_src_get_freq_hz(SDMMC_CLK_SRC_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_freq_hz);
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ESP_RETURN_ON_ERROR(esp_clk_tree_src_get_freq_hz(SDMMC_CLK_SRC_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_freq_hz),
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TAG, "get source clock frequency failed");
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//Now we're in high speed. Note ESP SDMMC Host HW only supports integer divider.
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int delay_phase_num = 0;
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@ -397,7 +398,8 @@ esp_err_t sdmmc_host_set_input_delay(int slot, sdmmc_delay_phase_t delay_phase)
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return ESP_OK;
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}
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esp_err_t sdmmc_host_start_command(int slot, sdmmc_hw_cmd_t cmd, uint32_t arg) {
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esp_err_t sdmmc_host_start_command(int slot, sdmmc_hw_cmd_t cmd, uint32_t arg)
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{
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if (!(slot == 0 || slot == 1)) {
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return ESP_ERR_INVALID_ARG;
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}
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@ -526,7 +528,7 @@ static void configure_pin_iomux(uint8_t gpio_num)
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#elif SOC_SDMMC_USE_GPIO_MATRIX
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static void configure_pin_gpio_matrix(uint8_t gpio_num, uint8_t gpio_matrix_sig, gpio_mode_t mode, const char* name)
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static void configure_pin_gpio_matrix(uint8_t gpio_num, uint8_t gpio_matrix_sig, gpio_mode_t mode, const char *name)
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{
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assert (gpio_num != (uint8_t) GPIO_NUM_NC);
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ESP_LOGD(TAG, "using GPIO%d as %s pin", gpio_num, name);
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@ -543,7 +545,7 @@ static void configure_pin_gpio_matrix(uint8_t gpio_num, uint8_t gpio_matrix_sig,
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#endif // SOC_SDMMC_USE_{IOMUX,GPIO_MATRIX}
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esp_err_t sdmmc_host_init_slot(int slot, const sdmmc_slot_config_t* slot_config)
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esp_err_t sdmmc_host_init_slot(int slot, const sdmmc_slot_config_t *slot_config)
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{
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if (!s_intr_handle) {
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return ESP_ERR_INVALID_STATE;
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@ -559,12 +561,11 @@ esp_err_t sdmmc_host_init_slot(int slot, const sdmmc_slot_config_t* slot_config)
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uint8_t slot_width = slot_config->width;
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// Configure pins
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const sdmmc_slot_info_t* slot_info = &sdmmc_slot_info[slot];
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const sdmmc_slot_info_t *slot_info = &sdmmc_slot_info[slot];
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if (slot_width == SDMMC_SLOT_WIDTH_DEFAULT) {
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slot_width = slot_info->width;
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}
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else if (slot_width > slot_info->width) {
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} else if (slot_width > slot_info->width) {
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return ESP_ERR_INVALID_ARG;
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}
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s_slot_width[slot] = slot_width;
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@ -683,7 +684,7 @@ esp_err_t sdmmc_host_deinit(void)
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return ESP_OK;
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}
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esp_err_t sdmmc_host_wait_for_event(int tick_count, sdmmc_event_t* out_event)
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esp_err_t sdmmc_host_wait_for_event(int tick_count, sdmmc_event_t *out_event)
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{
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if (!out_event) {
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return ESP_ERR_INVALID_ARG;
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@ -778,7 +779,6 @@ static void sdmmc_host_dma_init(void)
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SDMMC.idinten.ti = 1;
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}
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void sdmmc_host_dma_stop(void)
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{
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SDMMC.ctrl.use_internal_dma = 0;
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@ -787,7 +787,7 @@ void sdmmc_host_dma_stop(void)
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SDMMC.bmod.enable = 0;
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}
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void sdmmc_host_dma_prepare(sdmmc_desc_t* desc, size_t block_size, size_t data_size)
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void sdmmc_host_dma_prepare(sdmmc_desc_t *desc, size_t block_size, size_t data_size)
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{
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// Set size of data and DMA descriptor pointer
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SDMMC.bytcnt = data_size;
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@ -862,7 +862,8 @@ esp_err_t sdmmc_host_io_int_wait(int slot, TickType_t timeout_ticks)
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* may be dropped. We ignore this problem for now, since the there are no other
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* interesting events which can get lost due to this.
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*/
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static void sdmmc_isr(void* arg) {
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static void sdmmc_isr(void *arg)
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{
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QueueHandle_t queue = (QueueHandle_t) arg;
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sdmmc_event_t event;
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int higher_priority_task_awoken = pdFALSE;
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@ -156,7 +156,6 @@ static esp_err_t sdm_register_to_group(sdm_channel_t *chan)
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portEXIT_CRITICAL(&group->spinlock);
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if (chan_id < 0) {
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sdm_release_group_handle(group);
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group = NULL;
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} else {
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chan->group = group;
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chan->chan_id = chan_id;
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@ -5,3 +5,4 @@ CONFIG_PARLIO_ISR_IRAM_SAFE=y
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CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH=y
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# silent the error check, as the error string are stored in rodata, causing RTL check failure
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CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT=y
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CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE=y
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@ -8,3 +8,4 @@ CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH=y
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CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT=y
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CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
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CONFIG_HAL_ASSERTION_SILENT=y
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CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE=y
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -625,7 +625,7 @@ static esp_err_t test_touch_check_ch_touched_with_proximity(uint32_t test_ch_num
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continue;
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} else { // If the interrupt type error, test error.
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ESP_LOGI(TAG, "Touch[%"PRIu32"] intr error, status %"PRIx32", evt_msk0x%x", evt.pad_num, evt.pad_status, evt.intr_mask);
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continue;;
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continue;
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}
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} else {
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ESP_LOGI(TAG, "Touch intr exceed time");
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@ -667,7 +667,7 @@ static esp_err_t test_touch_check_ch_released_with_proximity(uint32_t test_ch_nu
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continue;
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} else { // If the interrupt type error, test error.
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ESP_LOGI(TAG, "Touch[%"PRIu32"] intr error, status %"PRIx32", evt_msk0x%x", evt.pad_num, evt.pad_status, evt.intr_mask);
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continue;;
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continue;
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}
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} else {
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ESP_LOGI(TAG, "Touch intr exceed time");
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@ -295,6 +295,7 @@ esp_err_t touch_pad_config(touch_pad_t touch_num, uint16_t threshold)
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uint32_t wait_time_ms = 0;
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uint32_t wait_tick = 0;
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uint32_t rtc_clk_freq = rtc_clk_slow_freq_get_hz();
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assert(rtc_clk_freq != 0);
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touch_pad_set_group_mask((1 << touch_num), (1 << touch_num), (1 << touch_num));
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touch_pad_get_measurement_interval(&sleep_time);
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touch_pad_get_measurement_clock_cycles(&meas_cycle);
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@ -688,7 +688,7 @@ esp_err_t twai_reconfigure_alerts(uint32_t alerts_enabled, uint32_t *current_ale
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TWAI_ENTER_CRITICAL();
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//Clear any unhandled alerts
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if (current_alerts != NULL) {
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*current_alerts = p_twai_obj->alerts_triggered;;
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*current_alerts = p_twai_obj->alerts_triggered;
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}
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p_twai_obj->alerts_triggered = 0;
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p_twai_obj->alerts_enabled = alerts_enabled; //Update enabled alerts
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -145,7 +145,7 @@ static esp_err_t etm_chan_register_to_group(esp_etm_channel_t *chan)
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} else {
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chan->chan_id = chan_id;
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chan->group = group;
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break;;
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break;
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}
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}
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ESP_RETURN_ON_FALSE(chan_id != -1, ESP_ERR_NOT_FOUND, TAG, "no free channel");
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@ -756,7 +756,7 @@ esp_err_t esp_mprot_set_prot(const esp_memp_config_t *memp_config)
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esp_err_t esp_mprot_dump_configuration(char **dump_info_string)
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{
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if (dump_info_string == NULL) {
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return ESP_ERR_INVALID_ARG;;
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return ESP_ERR_INVALID_ARG;
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}
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*dump_info_string = calloc(1024, 1);
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@ -230,7 +230,7 @@ void emac_hal_init_mac_default(emac_hal_context_t *hal)
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/* Enable Carrier Sense During Transmission */
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emac_ll_carrier_sense_enable(hal->mac_regs, true);
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/* Select speed: port: 10/100 Mbps, here set default 100M, afterwards, will reset by auto-negotiation */
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emac_ll_set_port_speed(hal->mac_regs, ETH_SPEED_100M);;
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emac_ll_set_port_speed(hal->mac_regs, ETH_SPEED_100M);
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/* Allow the reception of frames when the TX_EN signal is asserted in Half-Duplex mode */
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emac_ll_recv_own_enable(hal->mac_regs, true);
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/* Disable internal loopback mode */
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@ -312,7 +312,7 @@ static inline void mcpwm_ll_timer_set_start_stop_command(mcpwm_dev_t *mcpwm, int
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break;
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default:
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HAL_ASSERT(false);
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break;;
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break;
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}
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}
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@ -918,7 +918,7 @@ static inline void mcpwm_ll_operator_set_deadtime_clock_src(mcpwm_dev_t *mcpwm,
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break;
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case MCPWM_LL_DEADTIME_CLK_SRC_TIMER:
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mcpwm->operators[operator_id].dt_cfg.dt_clk_sel = 1;
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break;;
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break;
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default:
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HAL_ASSERT(false);
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}
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@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -323,7 +323,7 @@ static inline void mcpwm_ll_timer_set_start_stop_command(mcpwm_dev_t *mcpwm, int
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break;
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default:
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HAL_ASSERT(false);
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break;;
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break;
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}
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}
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@ -941,7 +941,7 @@ static inline void mcpwm_ll_operator_set_deadtime_clock_src(mcpwm_dev_t *mcpwm,
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break;
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case MCPWM_LL_DEADTIME_CLK_SRC_TIMER:
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mcpwm->operators[operator_id].dt_cfg.db_clk_sel = 1;
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break;;
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break;
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default:
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HAL_ASSERT(false);
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}
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@ -321,7 +321,7 @@ static inline void mcpwm_ll_timer_set_start_stop_command(mcpwm_dev_t *mcpwm, int
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break;
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default:
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HAL_ASSERT(false);
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break;;
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break;
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}
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}
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@ -939,7 +939,7 @@ static inline void mcpwm_ll_operator_set_deadtime_clock_src(mcpwm_dev_t *mcpwm,
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break;
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case MCPWM_LL_DEADTIME_CLK_SRC_TIMER:
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mcpwm->operators[operator_id].dt_cfg.db_clk_sel = 1;
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break;;
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break;
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default:
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HAL_ASSERT(false);
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}
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||||
|
@ -312,7 +312,7 @@ static inline void mcpwm_ll_timer_set_start_stop_command(mcpwm_dev_t *mcpwm, int
|
||||
break;
|
||||
default:
|
||||
HAL_ASSERT(false);
|
||||
break;;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
@ -930,7 +930,7 @@ static inline void mcpwm_ll_operator_set_deadtime_clock_src(mcpwm_dev_t *mcpwm,
|
||||
break;
|
||||
case MCPWM_LL_DEADTIME_CLK_SRC_TIMER:
|
||||
mcpwm->operators[operator_id].dt_cfg.dt_clk_sel = 1;
|
||||
break;;
|
||||
break;
|
||||
default:
|
||||
HAL_ASSERT(false);
|
||||
}
|
||||
|
@ -235,8 +235,8 @@ void app_main(void)
|
||||
tx_task_queue = xQueueCreate(1, sizeof(tx_task_action_t));
|
||||
rx_task_queue = xQueueCreate(1, sizeof(rx_task_action_t));
|
||||
ctrl_task_sem = xSemaphoreCreateBinary();
|
||||
stop_data_sem = xSemaphoreCreateBinary();;
|
||||
done_sem = xSemaphoreCreateBinary();;
|
||||
stop_data_sem = xSemaphoreCreateBinary();
|
||||
done_sem = xSemaphoreCreateBinary();
|
||||
xTaskCreatePinnedToCore(twai_receive_task, "TWAI_rx", 4096, NULL, RX_TASK_PRIO, NULL, tskNO_AFFINITY);
|
||||
xTaskCreatePinnedToCore(twai_transmit_task, "TWAI_tx", 4096, NULL, TX_TASK_PRIO, NULL, tskNO_AFFINITY);
|
||||
xTaskCreatePinnedToCore(twai_control_task, "TWAI_ctrl", 4096, NULL, CTRL_TSK_PRIO, NULL, tskNO_AFFINITY);
|
||||
|
Loading…
Reference in New Issue
Block a user