Commit Graph

70 Commits

Author SHA1 Message Date
laokaiyao
ec812c1370 adc: add ADC target test for esp32c6 2022-12-23 14:05:56 +08:00
laokaiyao
5333ac81bf adc: support ADC on esp32c6 (driver/test/example) 2022-12-23 11:24:06 +08:00
laokaiyao
e27f3e3128 adc: support ADC on esp32c6 (hal) 2022-12-23 11:24:06 +08:00
Jiang Jiang Jian
066dc196af Merge branch 'feature/esp32c6_wifi_bt_common_dependcy_support' into 'master'
esp32c6: support esp32c6 phy

Closes IDF-5680

See merge request espressif/esp-idf!21576
2022-12-19 12:16:11 +08:00
wuzhenghui
8f78520342 esp_phy: only esp32c3&esp32s3 support MAC_BB_PD, remove unused caps define 2022-12-16 15:47:59 +08:00
Armando
6aa7091199 adc: added a soc macro indicating digital controller supported unit 2022-12-16 02:06:03 +00:00
wuzhenghui
b887f86a78 soc: add SOC_IEEE802154_SUPPORTED caps 2022-12-15 17:18:28 +08:00
Jiang Jiang Jian
97d6050fea Merge branch 'feature/esp32c2_optimize_npl_element_count' into 'master'
Feature/esp32c2 optimize npl element count

Closes BT-3012

See merge request espressif/esp-idf!21562
2022-12-14 17:18:07 +08:00
Song Ruo Jing
244d3caa97 i2s: Fix esp32c6 get I2S_CLK_SRC_PLL_160M clock frequency value wrong issue 2022-12-13 19:18:34 +08:00
Song Ruo Jing
182e937c5a clk_tree: Add basic clock support for esp32c6
- Support SOC ROOT clock source switch
    - Support CPU frequency change
    - Support RTC SLOW clock source switch
    - Support RTC SLOW clock + RC FAST calibration

    Remove FPGA build for esp32c6
2022-12-13 19:18:34 +08:00
zwl
cdcdc50cfe Renamed BAH 2022-12-13 18:02:19 +08:00
morris
62f1cbca2c gpio: support glitch filter 2022-12-09 11:33:42 +08:00
Song Ruo Jing
9402ab427b ledc: Add basic support for esp32c6 2022-12-07 18:40:50 +08:00
Armando (Dou Yiwen)
2ad7b85a9e Merge branch 'bugfix/improve_ext_virtual_memory_allocation_in_2nd_btld' into 'master'
bootloader: improve irom & drom mapping way in 2nd bootloader on esp32c6

Closes IDF-6331

See merge request espressif/esp-idf!21173
2022-11-25 15:24:06 +08:00
Armando
9d9d1e4bf3 soc: remove unused macro in ext_mem_defs.h
ESP_CACHE_TEMP_ADDR is not used in IDF
2022-11-24 10:29:35 +08:00
Konstantin Kondrashov
b4580a1980 Merge branch 'feature/esp_timer_add_ll_for_rc_fast_clk' into 'master'
hal: Adds hal/ll func for SYSTIMER to select clock source: XTAL or RC_FAST_CLK

Closes IDF-5323

See merge request espressif/esp-idf!21136
2022-11-23 15:05:48 +08:00
KonstantinKondrashov
63f852adc8 hal: Adds hal/ll func for SYSTIMER to select clock source: XTAL or RC_FAST_CLK 2022-11-22 20:29:19 +08:00
Armando
c3682bf0a4 soc: update iram/dram addr range in ext_mem_defs.h
IRAM0/DRAM0 addr range update, on s3, c3, c2, h4, c6:

IRAM0_ADDRESS_LOW ~ IRAM0_ADDRESS_HIGH
DRAM0_ADDRESS_LOW ~ DRAM0_ADDRESS_HIGH

now are for the real IRAM0 and DRAM0
2022-11-22 18:53:50 +08:00
Omar Chebib
cd21058097 C/Cxx: unify static assertions with the macro ESP_STATIC_ASSERT
Closes https://github.com/espressif/esp-idf/issues/9938
2022-11-21 16:18:08 +08:00
laokaiyao
8677216576 esp32h2: renaming esp32h2 to esp32h4 2022-11-08 17:05:33 +08:00