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Merge branch 'feature/esp32c2_optimize_npl_element_count' into 'master'

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Feature/esp32c2 optimize npl element count

Closes BT-3012

See merge request espressif/esp-idf!21562
This commit is contained in:
Jiang Jiang Jian 2022-12-14 17:18:07 +08:00
commit 97d6050fea
12 changed files with 499 additions and 325 deletions
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8
components/bt/controller/esp32c2/bt.c
View File

@ -139,6 +139,7 @@ extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
extern int ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
extern int ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
extern int ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
extern uint32_t _bt_bss_start;
extern uint32_t _bt_bss_end;
extern uint32_t _nimble_bss_start;
@ -590,10 +591,11 @@ void ble_rtc_clk_init(void)
}
esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
{
esp_err_t ret = ESP_OK;
ble_npl_count_info_t npl_info;
memset(&npl_info, 0, sizeof(ble_npl_count_info_t));
if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
@ -627,7 +629,9 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
goto free_mem;
}
if (npl_freertos_mempool_init() != 0) {
ble_get_npl_element_info(cfg, &npl_info);
if (npl_freertos_mempool_init(&npl_info) != 0) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl mempool init failed");
ret = ESP_ERR_INVALID_ARG;
goto free_mem;

437
components/bt/controller/esp32h4/bt.c
View File

@ -61,9 +61,16 @@
#define OSI_COEX_VERSION 0x00010006
#define OSI_COEX_MAGIC_VALUE 0xFADEBEAD
#define EXT_FUNC_VERSION 0x20220125
#define EXT_FUNC_VERSION 0x20221122
#define EXT_FUNC_MAGIC_VALUE 0xA5A5A5A5
#define BT_ASSERT_PRINT ets_printf
#ifdef CONFIG_BT_BLUEDROID_ENABLED
/* ACL_DATA_MBUF_LEADINGSPCAE: The leadingspace in user info header for ACL data */
#define ACL_DATA_MBUF_LEADINGSPCAE 4
#endif
/* Types definition
************************************************************************
*/
@ -93,9 +100,9 @@ struct ext_funcs_t {
void (* _task_delete)(void *task_handle);
void (*_osi_assert)(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
uint32_t (* _os_random)(void);
int (* _ecc_gen_key_pair)(uint8_t *pub, uint8_t *priv);
int (* _ecc_gen_key_pair)(uint8_t *public, uint8_t *priv);
int (* _ecc_gen_dh_key)(const uint8_t *remote_pub_key_x, const uint8_t *remote_pub_key_y, const uint8_t *local_priv_key, uint8_t *dhkey);
int (* _esp_reset_rpa_moudle)(void);
void (* _esp_reset_rpa_moudle)(void);
uint32_t magic;
};
@ -117,14 +124,12 @@ extern int esp_ble_ll_set_public_addr(const uint8_t *addr);
extern int esp_register_npl_funcs (struct npl_funcs_t *p_npl_func);
extern void esp_unregister_npl_funcs (void);
extern void npl_freertos_mempool_deinit(void);
/* TX power */
int ble_txpwr_set(int power_type, int power_level);
int ble_txpwr_get(int power_type);
extern void bt_bb_v2_init_cmplx(uint8_t i);
extern int os_msys_buf_alloc(void);
extern uint32_t r_os_cputime_get32(void);
extern uint32_t r_os_cputime_ticks_to_usecs(uint32_t ticks);
extern void r_ble_ll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg, void *w_arg, uint32_t us_to_enabled);
extern void r_ble_lll_rfmgmt_set_sleep_cb(void *s_cb, void *w_cb, void *s_arg, void *w_arg, uint32_t us_to_enabled);
extern void r_ble_rtc_wake_up_state_clr(void);
extern int os_msys_init(void);
extern void os_msys_buf_free(void);
extern void bt_bb_set_le_tx_on_delay(uint32_t delay_us);
@ -132,6 +137,17 @@ extern int ble_sm_alg_gen_dhkey(const uint8_t *peer_pub_key_x,
const uint8_t *peer_pub_key_y,
const uint8_t *our_priv_key, uint8_t *out_dhkey);
extern int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv);
extern int ble_txpwr_set(esp_ble_enhanced_power_type_t power_type, uint16_t handle, int power_level);
extern int ble_txpwr_get(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
extern int ble_get_npl_element_info(esp_bt_controller_config_t *cfg, ble_npl_count_info_t * npl_info);
extern uint32_t _bt_bss_start;
extern uint32_t _bt_bss_end;
extern uint32_t _nimble_bss_start;
extern uint32_t _nimble_bss_end;
extern uint32_t _nimble_data_start;
extern uint32_t _nimble_data_end;
extern uint32_t _bt_data_start;
extern uint32_t _bt_data_end;
/* Local Function Declaration
*********************************************************************
@ -155,7 +171,7 @@ static int esp_intr_free_wrapper(void **ret_handle);
static void osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2);
static uint32_t osi_random_wrapper(void);
static int esp_reset_rpa_moudle(void);
static void esp_reset_rpa_moudle(void);
/* Local variable definition
@ -165,12 +181,11 @@ static int esp_reset_rpa_moudle(void);
/* Static variable declare */
static DRAM_ATTR esp_bt_controller_status_t ble_controller_status = ESP_BT_CONTROLLER_STATUS_IDLE;
/* This variable tells if BLE is running */
static bool s_ble_active = false;
#ifdef CONFIG_PM_ENABLE
static DRAM_ATTR esp_pm_lock_handle_t s_pm_lock = NULL;
static bool s_pm_lock_acquired = true;
static DRAM_ATTR bool s_btdm_allow_light_sleep;
// pm_lock to prevent light sleep when using main crystal as Bluetooth low power clock
static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock;
#define BTDM_MIN_TIMER_UNCERTAINTY_US (200)
#endif /* #ifdef CONFIG_PM_ENABLE */
@ -180,10 +195,11 @@ static DRAM_ATTR esp_pm_lock_handle_t s_light_sleep_pm_lock;
#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
#define BLE_RTC_DELAY_US (0)
static void btdm_slp_tmr_callback(void *arg);
static DRAM_ATTR esp_timer_handle_t s_btdm_slp_tmr = NULL;
static void ble_sleep_timer_callback(void *arg);
static DRAM_ATTR esp_timer_handle_t s_ble_sleep_timer = NULL;
#endif
static const struct osi_coex_funcs_t s_osi_coex_funcs_ro = {
._magic = OSI_COEX_MAGIC_VALUE,
._version = OSI_COEX_VERSION,
@ -217,16 +233,16 @@ struct ext_funcs_t ext_funcs_ro = {
.magic = EXT_FUNC_MAGIC_VALUE,
};
static int IRAM_ATTR esp_reset_rpa_moudle(void)
static void IRAM_ATTR esp_reset_rpa_moudle(void)
{
DPORT_SET_PERI_REG_MASK(SYSTEM_MODEM_RST_EN_REG, SYSTEM_BLE_SEC_AAR_RST);
DPORT_CLEAR_PERI_REG_MASK(SYSTEM_MODEM_RST_EN_REG, SYSTEM_BLE_SEC_AAR_RST);
return 0;
DPORT_SET_PERI_REG_MASK(SYSTEM_MODEM_RST_EN_REG, SYSTEM_BLE_SEC_BAH_RST);
DPORT_CLEAR_PERI_REG_MASK(SYSTEM_MODEM_RST_EN_REG, SYSTEM_BLE_SEC_BAH_RST);
}
static void IRAM_ATTR osi_assert_wrapper(const uint32_t ln, const char *fn, uint32_t param1, uint32_t param2)
{
ESP_LOGE(NIMBLE_PORT_LOG_TAG, "BLE assert: line %d in function %s, param: 0x%x, 0x%x", ln, fn, param1, param2);
BT_ASSERT_PRINT("BLE assert: line %d in function %s, param: 0x%x, 0x%x", ln, fn, param1, param2);
assert(0);
}
@ -249,6 +265,7 @@ static void coex_schm_status_bit_clear_wrapper(uint32_t type, uint32_t status)
#endif
}
#ifdef CONFIG_BT_BLUEDROID_ENABLED
bool esp_vhci_host_check_send_available(void)
{
if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_ENABLED) {
@ -306,11 +323,9 @@ void esp_vhci_host_send_packet(uint8_t *data, uint16_t len)
}
if (*(data) == DATA_TYPE_ACL) {
struct os_mbuf *om = os_msys_get_pkthdr(0, 0);
struct os_mbuf *om = os_msys_get_pkthdr(len, ACL_DATA_MBUF_LEADINGSPCAE);
assert(om);
memcpy(om->om_data, &data[1], len - 1);
om->om_len = len - 1;
OS_MBUF_PKTHDR(om)->omp_len = len - 1;
os_mbuf_append(om, &data[1], len - 1);
ble_hci_trans_hs_acl_tx(om);
}
@ -403,20 +418,28 @@ static int esp_intr_free_wrapper(void **ret_handle)
IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg)
{
esp_phy_disable();
if (!s_ble_active) {
return;
}
#ifdef CONFIG_PM_ENABLE
#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
uint32_t delta_tick;
uint32_t us_to_sleep;
uint32_t sleep_tick;
uint32_t tick_invalid = *(uint32_t*)(arg);
assert(arg != NULL);
if(!tick_invalid) {
uint32_t sleep_tick = r_os_cputime_get32();
if(enable_tick <= sleep_tick) {
if (!tick_invalid) {
sleep_tick = r_os_cputime_get32();
// start a timer to wake up and acquire the pm_lock before modem_sleep awakes
delta_tick = enable_tick - sleep_tick;
if (delta_tick & 0x80000000) {
return;
}
// start a timer to wake up and acquire the pm_lock before modem_sleep awakes
uint32_t us_to_sleep = r_os_cputime_ticks_to_usecs(enable_tick - sleep_tick);
assert(us_to_sleep > BTDM_MIN_TIMER_UNCERTAINTY_US);
esp_err_t err = esp_timer_start_once(s_btdm_slp_tmr, us_to_sleep - BTDM_MIN_TIMER_UNCERTAINTY_US);
us_to_sleep = r_os_cputime_ticks_to_usecs(delta_tick);
if (us_to_sleep <= BTDM_MIN_TIMER_UNCERTAINTY_US) {
return;
}
esp_err_t err = esp_timer_start_once(s_ble_sleep_timer, us_to_sleep - BTDM_MIN_TIMER_UNCERTAINTY_US);
if (err != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ESP timer start failed\n");
return;
@ -427,56 +450,43 @@ IRAM_ATTR void controller_sleep_cb(uint32_t enable_tick, void *arg)
#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
r_ble_rtc_wake_up_state_clr();
#endif
if (s_pm_lock_acquired) {
assert(s_pm_lock != NULL);
esp_pm_lock_release(s_pm_lock);
s_pm_lock_acquired = false;
}
esp_pm_lock_release(s_pm_lock);
#endif // CONFIG_PM_ENABLE
esp_phy_disable();
s_ble_active = false;
}
IRAM_ATTR void controller_wakeup_cb(void *arg)
{
if (s_ble_active) {
return;
}
esp_phy_enable();
// need to check if need to call pm lock here
#ifdef CONFIG_PM_ENABLE
assert(s_pm_lock != NULL);
if (!s_pm_lock_acquired) {
s_pm_lock_acquired = true;
esp_pm_lock_acquire(s_pm_lock);
}
esp_pm_lock_acquire(s_pm_lock);
#endif //CONFIG_PM_ENABLE
s_ble_active = true;
}
#ifdef CONFIG_PM_ENABLE
#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
static void btdm_slp_tmr_callback(void * arg)
static void ble_sleep_timer_callback(void * arg)
{
(void)(arg);
if (!s_pm_lock_acquired) {
assert(s_pm_lock != NULL);
s_pm_lock_acquired = true;
esp_pm_lock_acquire(s_pm_lock);
}
}
#endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
#endif // CONFIG_PM_ENABLE
void controller_sleep_init(void)
esp_err_t controller_sleep_init(void)
{
#ifdef CONFIG_PM_ENABLE
s_btdm_allow_light_sleep = false;
#endif // CONFIG_PM_ENABLE
esp_err_t rc = 0;
#ifdef CONFIG_BT_LE_SLEEP_ENABLE
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "BLE modem sleep is enabled\n");
r_ble_lll_rfmgmt_set_sleep_cb(controller_sleep_cb, controller_wakeup_cb, 0, 0, 500 + BLE_RTC_DELAY_US);
#ifdef CONFIG_PM_ENABLE
s_btdm_allow_light_sleep = true;
esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_ON);
#endif // CONFIG_PM_ENABLE
@ -484,21 +494,19 @@ void controller_sleep_init(void)
// enable light sleep
#ifdef CONFIG_PM_ENABLE
if (!s_btdm_allow_light_sleep) {
if (esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "btnosleep", &s_light_sleep_pm_lock) != ESP_OK) {
goto error;
}
}
if (esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "bt", &s_pm_lock) != ESP_OK) {
rc = esp_pm_lock_create(ESP_PM_CPU_FREQ_MAX, 0, "bt", &s_pm_lock);
if (rc != ESP_OK) {
goto error;
}
esp_pm_lock_acquire(s_pm_lock);
#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
esp_timer_create_args_t create_args = {
.callback = btdm_slp_tmr_callback,
.callback = ble_sleep_timer_callback,
.arg = NULL,
.name = "btSlp"
};
if (esp_timer_create(&create_args, &s_btdm_slp_tmr) != ESP_OK) {
rc = esp_timer_create(&create_args, &s_ble_sleep_timer);
if (rc != ESP_OK) {
goto error;
}
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is ESP timer");
@ -509,32 +517,20 @@ void controller_sleep_init(void)
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "Enable light sleep, the wake up source is BLE timer");
#endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
s_pm_lock_acquired = true;
if (!s_btdm_allow_light_sleep) {
esp_pm_lock_acquire(s_light_sleep_pm_lock);
}
if (s_pm_lock) {
esp_pm_lock_acquire(s_pm_lock);
}
return;
return rc;
error:
if (!s_btdm_allow_light_sleep) {
if (s_light_sleep_pm_lock != NULL) {
esp_pm_lock_delete(s_light_sleep_pm_lock);
s_light_sleep_pm_lock = NULL;
}
}
/*lock should release first and then delete*/
if (s_pm_lock != NULL) {
esp_pm_lock_release(s_pm_lock);
esp_pm_lock_delete(s_pm_lock);
s_pm_lock = NULL;
}
#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
if (s_btdm_slp_tmr != NULL) {
esp_timer_delete(s_btdm_slp_tmr);
s_btdm_slp_tmr = NULL;
if (s_ble_sleep_timer != NULL) {
esp_timer_stop(s_ble_sleep_timer);
esp_timer_delete(s_ble_sleep_timer);
s_ble_sleep_timer = NULL;
}
#endif // CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
@ -543,32 +539,33 @@ error:
#endif // CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
#endif //CONFIG_PM_ENABLE
return rc;
}
void controller_sleep_deinit(void)
{
#ifdef CONFIG_PM_ENABLE
if (!s_btdm_allow_light_sleep) {
if (s_light_sleep_pm_lock != NULL) {
esp_pm_lock_delete(s_light_sleep_pm_lock);
s_light_sleep_pm_lock = NULL;
}
}
if (s_pm_lock != NULL) {
esp_pm_lock_delete(s_pm_lock);
s_pm_lock = NULL;
}
#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
if(s_btdm_slp_tmr != NULL) {
esp_timer_stop(s_btdm_slp_tmr);
esp_timer_delete(s_btdm_slp_tmr);
s_btdm_slp_tmr = NULL;
}
#endif
s_pm_lock_acquired = false;
#endif
#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
r_ble_rtc_wake_up_state_clr();
esp_sleep_disable_bt_wakeup();
#endif //CONFIG_BT_LE_WAKEUP_SOURCE_BLE_RTC_TIMER
esp_sleep_pd_config(ESP_PD_DOMAIN_XTAL, ESP_PD_OPTION_AUTO);
/*lock should release first and then delete*/
if (s_ble_active) {
esp_pm_lock_release(s_pm_lock);
}
esp_pm_lock_delete(s_pm_lock);
s_pm_lock = NULL;
#ifdef CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
if (s_ble_sleep_timer != NULL) {
esp_timer_stop(s_ble_sleep_timer);
esp_timer_delete(s_ble_sleep_timer);
s_ble_sleep_timer = NULL;
}
#endif //CONFIG_BT_LE_WAKEUP_SOURCE_CPU_RTC_TIMER
#endif //CONFIG_PM_ENABLE
}
#if CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2
@ -581,44 +578,53 @@ void periph_module_etm_active(void)
esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
{
esp_err_t ret = ESP_OK;
ble_npl_count_info_t npl_info;
memset(&npl_info, 0, sizeof(ble_npl_count_info_t));
if (ble_controller_status != ESP_BT_CONTROLLER_STATUS_IDLE) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "invalid controller state");
return ESP_FAIL;
return ESP_ERR_INVALID_STATE;
}
if (cfg == NULL) {
if (!cfg) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "cfg is NULL");
return ESP_ERR_INVALID_ARG;
}
if (esp_register_ext_funcs(&ext_funcs_ro) != 0) {
ret = esp_register_ext_funcs(&ext_funcs_ro);
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "register extend functions failed");
return ESP_ERR_INVALID_ARG;
return ret;
}
/* Initialize the function pointers for OS porting */
npl_freertos_funcs_init();
struct npl_funcs_t *p_npl_funcs = npl_freertos_funcs_get();
if (!p_npl_funcs) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl functions get failed");
return ESP_ERR_INVALID_ARG;
}
if (esp_register_npl_funcs(p_npl_funcs) != 0) {
ret = esp_register_npl_funcs(p_npl_funcs);
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl functions register failed");
return ESP_ERR_INVALID_ARG;
goto free_mem;
}
if (npl_freertos_mempool_init() != 0) {
ble_get_npl_element_info(cfg, &npl_info);
if (npl_freertos_mempool_init(&npl_info) != 0) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "npl mempool init failed");
return ESP_ERR_INVALID_ARG;
ret = ESP_ERR_INVALID_ARG;
goto free_mem;
}
/* Initialize the global memory pool */
if (os_msys_buf_alloc() != 0) {
ret = os_msys_buf_alloc();
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "os msys alloc failed");
return ESP_ERR_INVALID_ARG;
goto free_mem;
}
os_msys_init();
@ -636,25 +642,30 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
// init phy
esp_phy_enable();
s_ble_active = true;
// set bb delay
bt_bb_set_le_tx_on_delay(50);
if (ble_osi_coex_funcs_register((struct osi_coex_funcs_t *)&s_osi_coex_funcs_ro) != 0) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "osi coex funcs reg failed");
return ESP_ERR_INVALID_ARG;
ret = ESP_ERR_INVALID_ARG;
goto free_controller;
}
#if CONFIG_SW_COEXIST_ENABLE
coex_init();
#endif
int rc = ble_controller_init(cfg);
if (rc != 0) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", rc);
return ESP_ERR_NO_MEM;
ret = ble_controller_init(cfg);
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "ble_controller_init failed %d", ret);
goto free_controller;
}
controller_sleep_init();
ret = controller_sleep_init();
if (ret != ESP_OK) {
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "controller_sleep_init failed %d", ret);
goto free_controller;
}
uint8_t mac[6];
ESP_ERROR_CHECK(esp_read_mac((uint8_t *)mac, ESP_MAC_BT));
@ -667,8 +678,21 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg)
ble_hci_trans_cfg_hs((ble_hci_trans_rx_cmd_fn *)ble_hci_unregistered_hook,NULL,
(ble_hci_trans_rx_acl_fn *)ble_hci_unregistered_hook,NULL);
return ESP_OK;
free_controller:
controller_sleep_deinit();
ble_controller_deinit();
esp_phy_disable();
#if CONFIG_BT_NIMBLE_ENABLED
ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
#endif // CONFIG_BT_NIMBLE_ENABLED
free_mem:
os_msys_buf_free();
npl_freertos_mempool_deinit();
esp_unregister_npl_funcs();
npl_freertos_funcs_deinit();
esp_unregister_ext_funcs();
return ret;
}
esp_err_t esp_bt_controller_deinit(void)
@ -680,9 +704,13 @@ esp_err_t esp_bt_controller_deinit(void)
controller_sleep_deinit();
if (ble_controller_deinit() != 0) {
return ESP_FAIL;
if (s_ble_active) {
esp_phy_disable();
s_ble_active = false;
}
ble_controller_deinit();
#if CONFIG_BT_NIMBLE_ENABLED
/* De-initialize default event queue */
ble_npl_eventq_deinit(nimble_port_get_dflt_eventq());
@ -740,13 +768,58 @@ esp_err_t esp_bt_controller_disable(void)
esp_err_t esp_bt_controller_mem_release(esp_bt_mode_t mode)
{
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "%s not implemented, return OK", __func__);
ESP_LOGD(NIMBLE_PORT_LOG_TAG, "%s not implemented, return OK", __func__);
return ESP_OK;
}
static esp_err_t try_heap_caps_add_region(intptr_t start, intptr_t end)
{
/* TODO */
int ret = ESP_ERR_INVALID_SIZE;
/* heap_caps_add_region() returns ESP_ERR_INVALID_SIZE if the memory region is
* is too small to fit a heap. This cannot be termed as a fatal error and hence
* we replace it by ESP_OK
*/
if (ret == ESP_ERR_INVALID_SIZE) {
return ESP_OK;
}
return ret;
}
esp_err_t esp_bt_mem_release(esp_bt_mode_t mode)
{
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "%s not implemented, return OK", __func__);
intptr_t mem_start, mem_end;
if (mode == ESP_BT_MODE_BLE) {
mem_start = (intptr_t)&_bt_bss_start;
mem_end = (intptr_t)&_bt_bss_end;
if (mem_start != mem_end) {
ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release BT BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
}
mem_start = (intptr_t)&_bt_data_start;
mem_end = (intptr_t)&_bt_data_end;
if (mem_start != mem_end) {
ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release BT Data [0x%08x] - [0x%08x]", mem_start, mem_end);
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
}
mem_start = (intptr_t)&_nimble_bss_start;
mem_end = (intptr_t)&_nimble_bss_end;
if (mem_start != mem_end) {
ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release NimBLE BSS [0x%08x] - [0x%08x]", mem_start, mem_end);
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
}
mem_start = (intptr_t)&_nimble_data_start;
mem_end = (intptr_t)&_nimble_data_end;
if (mem_start != mem_end) {
ESP_LOGD(NIMBLE_PORT_LOG_TAG, "Release NimBLE Data [0x%08x] - [0x%08x]", mem_start, mem_end);
ESP_ERROR_CHECK(try_heap_caps_add_region(mem_start, mem_end));
}
}
return ESP_OK;
}
@ -759,16 +832,120 @@ esp_bt_controller_status_t esp_bt_controller_get_status(void)
/* extra functions */
esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_t power_level)
{
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "%s not implemented, return OK", __func__);
return ESP_OK;
esp_err_t stat = ESP_FAIL;
switch (power_type) {
case ESP_BLE_PWR_TYPE_DEFAULT:
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
case ESP_BLE_PWR_TYPE_CONN_HDL2:
case ESP_BLE_PWR_TYPE_CONN_HDL3:
case ESP_BLE_PWR_TYPE_CONN_HDL4:
case ESP_BLE_PWR_TYPE_CONN_HDL5:
case ESP_BLE_PWR_TYPE_CONN_HDL6:
case ESP_BLE_PWR_TYPE_CONN_HDL7:
case ESP_BLE_PWR_TYPE_CONN_HDL8:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type, power_level) == 0) {
stat = ESP_OK;
}
break;
default:
stat = ESP_ERR_NOT_SUPPORTED;
break;
}
return stat;
}
esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type, uint16_t handle, esp_power_level_t power_level)
{
esp_err_t stat = ESP_FAIL;
switch (power_type) {
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
if (ble_txpwr_set(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0, power_level) == 0) {
stat = ESP_OK;
}
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
if (ble_txpwr_set(power_type, handle, power_level) == 0) {
stat = ESP_OK;
}
break;
default:
stat = ESP_ERR_NOT_SUPPORTED;
break;
}
return stat;
}
esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type)
{
ESP_LOGW(NIMBLE_PORT_LOG_TAG, "%s not implemented, return OK", __func__);
return ESP_PWR_LVL_N0;
int tx_level = 0;
switch (power_type) {
case ESP_BLE_PWR_TYPE_ADV:
case ESP_BLE_PWR_TYPE_SCAN:
case ESP_BLE_PWR_TYPE_DEFAULT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_PWR_TYPE_CONN_HDL0:
case ESP_BLE_PWR_TYPE_CONN_HDL1:
case ESP_BLE_PWR_TYPE_CONN_HDL2:
case ESP_BLE_PWR_TYPE_CONN_HDL3:
case ESP_BLE_PWR_TYPE_CONN_HDL4:
case ESP_BLE_PWR_TYPE_CONN_HDL5:
case ESP_BLE_PWR_TYPE_CONN_HDL6:
case ESP_BLE_PWR_TYPE_CONN_HDL7:
case ESP_BLE_PWR_TYPE_CONN_HDL8:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_CONN, power_type);
break;
default:
return ESP_PWR_LVL_INVALID;
}
if (tx_level < 0) {
return ESP_PWR_LVL_INVALID;
}
return (esp_power_level_t)tx_level;
}
esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t power_type, uint16_t handle)
{
int tx_level = 0;
switch (power_type) {
case ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT:
case ESP_BLE_ENHANCED_PWR_TYPE_SCAN:
case ESP_BLE_ENHANCED_PWR_TYPE_INIT:
tx_level = ble_txpwr_get(ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT, 0);
break;
case ESP_BLE_ENHANCED_PWR_TYPE_ADV:
case ESP_BLE_ENHANCED_PWR_TYPE_CONN:
tx_level = ble_txpwr_get(power_type, handle);
break;
default:
return ESP_PWR_LVL_INVALID;
}
if (tx_level < 0) {
return ESP_PWR_LVL_INVALID;
}
return (esp_power_level_t)tx_level;
}
#if (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED == true)
#define BLE_SM_KEY_ERR 0x17

2
components/bt/controller/lib_esp32c2/esp32c2-bt-lib

@ -1 +1 @@
Subproject commit 37a95345db97a6c6ebde522e4be0ab06c751a575
Subproject commit 2d0c9d0d5df1fa825ed3c48df968e3c9b8c434ee

2
components/bt/controller/lib_esp32h2/esp32h2-bt-lib

@ -1 +1 @@
Subproject commit 8bf4c4c2cb1f964122977c9995863f325346411d
Subproject commit f502278684195b9c20626ec8bb25430030d2ff23

41
components/bt/include/esp32h4/include/esp_bt.h
View File

@ -96,6 +96,15 @@ typedef enum {
ESP_PWR_LVL_INVALID = 0xFF, /*!< Indicates an invalid value */
} esp_power_level_t;
typedef enum {
ESP_BLE_ENHANCED_PWR_TYPE_DEFAULT = 0,
ESP_BLE_ENHANCED_PWR_TYPE_ADV,
ESP_BLE_ENHANCED_PWR_TYPE_SCAN,
ESP_BLE_ENHANCED_PWR_TYPE_INIT,
ESP_BLE_ENHANCED_PWR_TYPE_CONN,
ESP_BLE_ENHANCED_PWR_TYPE_MAX,
} esp_ble_enhanced_power_type_t;
typedef struct {
uint8_t type;
uint8_t val[6];
@ -118,7 +127,27 @@ esp_err_t esp_ble_tx_power_set(esp_ble_power_type_t power_type, esp_power_level_
*/
esp_power_level_t esp_ble_tx_power_get(esp_ble_power_type_t power_type);
#define CONFIG_VERSION 0x20220409
/**
* @brief ENHANCED API for Setting BLE TX power
* Connection Tx power should only be set after connection created.
* @param power_type : The enhanced type of which tx power, could set Advertising/Connection/Default and etc
* @param handle : The handle of Advertising or Connection and the value 0 for other enhanced power types.
* @param power_level: Power level(index) corresponding to absolute value(dbm)
* @return ESP_OK - success, other - failed
*/
esp_err_t esp_ble_tx_power_set_enhanced(esp_ble_enhanced_power_type_t power_type, uint16_t handle, esp_power_level_t power_level);
/**
* @brief ENHANCED API of Getting BLE TX power
* Connection Tx power should only be get after connection created.
* @param power_type : The enhanced type of which tx power, could set Advertising/Connection/Default and etc
* @param handle : The handle of Advertising or Connection and the value 0 for other enhanced power types.
* @return >= 0 - Power level, < 0 - Invalid
*/
esp_power_level_t esp_ble_tx_power_get_enhanced(esp_ble_enhanced_power_type_t power_type, uint16_t handle);
#define CONFIG_VERSION 0x20220824
#define CONFIG_MAGIC 0x5A5AA5A5
/**
@ -169,12 +198,13 @@ typedef struct {
uint8_t ble_hci_uart_uart_parity;
uint8_t enable_tx_cca;
uint8_t cca_rssi_thresh;
uint8_t cca_drop_mode;
int8_t cca_low_tx_pwr;
uint8_t sleep_en;
uint8_t coex_phy_coded_tx_rx_time_limit;
uint8_t dis_scan_backoff;
uint8_t scan_classify_filter_enable;
uint8_t ble_scan_classify_filter_enable;
uint8_t cca_drop_mode;
int8_t cca_low_tx_pwr;
uint8_t main_xtal_freq;
uint32_t config_magic;
} esp_bt_controller_config_t;
@ -225,7 +255,8 @@ typedef struct {
.cca_low_tx_pwr = 0, \
.sleep_en = NIMBLE_SLEEP_ENABLE, \
.coex_phy_coded_tx_rx_time_limit = DEFAULT_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF, \
.scan_classify_filter_enable = false, \
.ble_scan_classify_filter_enable = 0, \
.main_xtal_freq = CONFIG_XTAL_FREQ, \
.config_magic = CONFIG_MAGIC, \
}

8
components/bt/porting/nimble/include/nimble/nimble_port.h
View File

@ -35,6 +35,14 @@
extern "C" {
#endif
typedef struct {
uint16_t evt_count;
uint16_t evtq_count;
uint16_t co_count;
uint16_t sem_count;
uint16_t mutex_count;
} ble_npl_count_info_t;
void nimble_port_init(void);
void nimble_port_deinit(void);

2
components/bt/porting/npl/freertos/include/nimble/nimble_port_freertos.h
View File

@ -35,7 +35,7 @@ void nimble_port_freertos_init(TaskFunction_t host_task_fn);
void nimble_port_freertos_deinit(void);
void npl_freertos_funcs_init(void);
void npl_freertos_funcs_deinit(void);
int npl_freertos_mempool_init(void);
int npl_freertos_mempool_init(ble_npl_count_info_t *npl_info);
struct npl_funcs_t * npl_freertos_funcs_get(void);
#ifdef __cplusplus
}

279
components/bt/porting/npl/freertos/src/npl_os_freertos.c
View File

@ -18,6 +18,7 @@
#include "freertos/timers.h"
#include "freertos/portable.h"
#include "nimble/npl_freertos.h"
#include "nimble/nimble_port.h"
#include "os/os_mempool.h"
#include "esp_log.h"
@ -32,72 +33,15 @@ static const char *TAG = "Timer";
#define OS_MEM_ALLOC (1)
#define BT_LE_HCI_EVT_HI_BUF_COUNT DEFAULT_BT_LE_HCI_EVT_HI_BUF_COUNT
#define BT_LE_HCI_EVT_LO_BUF_COUNT DEFAULT_BT_LE_HCI_EVT_LO_BUF_COUNT
#define BT_LE_MAX_EXT_ADV_INSTANCES DEFAULT_BT_LE_MAX_EXT_ADV_INSTANCES
#define BT_LE_MAX_CONNECTIONS DEFAULT_BT_LE_MAX_CONNECTIONS
#if CONFIG_BT_NIMBLE_ENABLED
#if MYNEWT_VAL(BLE_LL_CFG_FEAT_LE_PING)
#define LL_CFG_FEAT_LE_PING_EVT (1)
#else
#define LL_CFG_FEAT_LE_PING_EVT (0)
#endif
#if MYNEWT_VAL(BLE_LL_CFG_FEAT_CTRL_TO_HOST_FLOW_CONTROL)
#define LL_CTRL_TO_HOST_FLOW_CTRL_EVT (1)
#else
#define LL_CTRL_TO_HOST_FLOW_CTRL_EVT (0)
#endif
#define BT_LE_LL_EXT_ADV_AUX_PTR_CNT MYNEWT_VAL(BLE_LL_EXT_ADV_AUX_PTR_CNT)
#else
#define BT_LE_LL_EXT_ADV_AUX_PTR_CNT (5)
#define LL_CFG_FEAT_LE_PING_EVT (1)
#define LL_CTRL_TO_HOST_FLOW_CTRL_EVT (1)
#if (!defined(SOC_ESP_NIMBLE_CONTROLLER) || !SOC_ESP_NIMBLE_CONTROLLER)
#error "not defined SOC_ESP_NIMBLE_CONTROLLER or SOC_ESP_NIMBLE_CONTROLLER is zero"
#endif
#define BLE_HS_HCI_EVT_COUNT \
(BT_LE_HCI_EVT_HI_BUF_COUNT + \
BT_LE_HCI_EVT_LO_BUF_COUNT)
#define LL_NPL_BASE_EVENT_COUNT (11)
#define LL_SCAN_EXT_AUX_EVT_CNT (BT_LE_LL_EXT_ADV_AUX_PTR_CNT)
#define HCI_LL_NPL_EVENT_COUNT (1)
#define ADV_LL_NPL_EVENT_COUNT ((BT_LE_MAX_EXT_ADV_INSTANCES+1)*3)
#define SCAN_LL_NPL_EVENT_COUNT (2)
#define RL_LL_NPL_EVENT_COUNT (1)
#define SYNC_LL_NPL_EVENT_COUNT (7)
#define CONN_MODULE_NPL_EVENT_COUNT (((LL_CFG_FEAT_LE_PING_EVT+2)*BT_LE_MAX_CONNECTIONS)+LL_CTRL_TO_HOST_FLOW_CTRL_EVT)
#define BLE_LL_EV_COUNT (LL_NPL_BASE_EVENT_COUNT + \
LL_SCAN_EXT_AUX_EVT_CNT + \
HCI_LL_NPL_EVENT_COUNT + \
ADV_LL_NPL_EVENT_COUNT + \
SCAN_LL_NPL_EVENT_COUNT + \
RL_LL_NPL_EVENT_COUNT + \
SYNC_LL_NPL_EVENT_COUNT + \
CONN_MODULE_NPL_EVENT_COUNT)
#define BLE_TOTAL_EV_COUNT (BLE_LL_EV_COUNT + BLE_HS_HCI_EVT_COUNT)
#define BLE_TOTAL_EVQ_COUNT (10)
#define BLE_TOTAL_CO_COUNT (40)
#define BLE_TOTAL_SEM_COUNT (10)
#define BLE_TOTAL_MUTEX_COUNT (10)
#if SOC_ESP_NIMBLE_CONTROLLER
#define BLE_HOST_CO_COUNT (8)
#define BLE_HOST_EV_COUNT (11 + BLE_HOST_CO_COUNT)
#define BLE_HOST_EVQ_COUNT (3)
#define BLE_HOST_SEM_COUNT (1)
#define BLE_HOST_MUTEX_COUNT (4)
struct os_mempool ble_freertos_ev_pool;
static os_membuf_t *ble_freertos_ev_buf = NULL;
@ -114,34 +58,7 @@ static os_membuf_t *ble_freertos_sem_buf = NULL;
struct os_mempool ble_freertos_mutex_pool;
static os_membuf_t *ble_freertos_mutex_buf = NULL;
#else
struct os_mempool ble_freertos_ev_pool;
static os_membuf_t ble_freertos_ev_buf[
OS_MEMPOOL_SIZE(BLE_TOTAL_EV_COUNT, sizeof (struct ble_npl_event_freertos))
];
struct os_mempool ble_freertos_evq_pool;
static os_membuf_t ble_freertos_evq_buf[
OS_MEMPOOL_SIZE(BLE_TOTAL_EVQ_COUNT, sizeof (struct ble_npl_eventq_freertos))
];
struct os_mempool ble_freertos_co_pool;
static os_membuf_t ble_freertos_co_buf[
OS_MEMPOOL_SIZE(BLE_TOTAL_CO_COUNT, sizeof (struct ble_npl_callout_freertos))
];
struct os_mempool ble_freertos_sem_pool;
static os_membuf_t ble_freertos_sem_buf[
OS_MEMPOOL_SIZE(BLE_TOTAL_SEM_COUNT, sizeof (struct ble_npl_sem_freertos))
];
struct os_mempool ble_freertos_mutex_pool;
static os_membuf_t ble_freertos_mutex_buf[
OS_MEMPOOL_SIZE(BLE_TOTAL_MUTEX_COUNT, sizeof (struct ble_npl_mutex_freertos))
];
#endif
static uint16_t ble_freertos_total_event_cnt = 0;
bool
IRAM_ATTR npl_freertos_os_started(void)
@ -206,9 +123,8 @@ npl_freertos_eventq_init(struct ble_npl_eventq *evq)
evq->eventq = os_memblock_get(&ble_freertos_evq_pool);
eventq = (struct ble_npl_eventq_freertos*)evq->eventq;
BLE_LL_ASSERT(eventq);
memset(eventq, 0, sizeof(*eventq));
eventq->q = xQueueCreate(BLE_TOTAL_EV_COUNT, sizeof(struct ble_npl_eventq *));
eventq->q = xQueueCreate(ble_freertos_total_event_cnt, sizeof(struct ble_npl_eventq *));
BLE_LL_ASSERT(eventq->q);
}
#else
@ -216,9 +132,8 @@ npl_freertos_eventq_init(struct ble_npl_eventq *evq)
evq->eventq = malloc(sizeof(struct ble_npl_eventq_freertos));
eventq = (struct ble_npl_eventq_freertos*)evq->eventq;
BLE_LL_ASSERT(eventq);
memset(eventq, 0, sizeof(*eventq));
eventq->q = xQueueCreate(BLE_TOTAL_EV_COUNT, sizeof(struct ble_npl_eventq *));
eventq->q = xQueueCreate(ble_freertos_total_event_cnt, sizeof(struct ble_npl_eventq *));
BLE_LL_ASSERT(eventq->q);
}
#endif
@ -1117,113 +1032,153 @@ void npl_freertos_funcs_init(void)
memcpy(npl_funcs, &npl_funcs_ro, sizeof(struct npl_funcs_t));
}
int npl_freertos_mempool_init(void)
int npl_freertos_mempool_init(ble_npl_count_info_t *npl_info)
{
int rc = -1;
uint16_t ble_total_evt_count = 0;
uint16_t ble_total_co_count = 0;
uint16_t ble_total_evtq_count = 0;
uint16_t ble_total_sem_count = 0;
uint16_t ble_total_mutex_count = 0;
#if SOC_ESP_NIMBLE_CONTROLLER
ble_freertos_ev_buf = malloc(OS_MEMPOOL_SIZE(BLE_TOTAL_EV_COUNT, sizeof (struct ble_npl_event_freertos)) * sizeof(os_membuf_t));
if(!ble_freertos_ev_buf) {
goto _error;
}
ble_freertos_evq_buf = malloc(OS_MEMPOOL_SIZE(BLE_TOTAL_EVQ_COUNT, sizeof (struct ble_npl_eventq_freertos)) * sizeof(os_membuf_t));
if(!ble_freertos_evq_buf) {
goto _error;
}
ble_freertos_co_buf = malloc(OS_MEMPOOL_SIZE(BLE_TOTAL_CO_COUNT, sizeof (struct ble_npl_callout_freertos)) * sizeof(os_membuf_t));
if(!ble_freertos_co_buf) {
goto _error;
}
ble_freertos_sem_buf = malloc(OS_MEMPOOL_SIZE(BLE_TOTAL_SEM_COUNT, sizeof (struct ble_npl_sem_freertos)) * sizeof(os_membuf_t));
if(!ble_freertos_sem_buf) {
goto _error;
}
ble_freertos_mutex_buf = malloc( OS_MEMPOOL_SIZE(BLE_TOTAL_MUTEX_COUNT, sizeof (struct ble_npl_mutex_freertos)) * sizeof(os_membuf_t));
if(!ble_freertos_mutex_buf) {
goto _error;
if (!npl_info) {
return -1;
}
#endif
ble_total_evt_count = npl_info->evt_count + BLE_HOST_EV_COUNT;
ble_total_evtq_count = npl_info->evtq_count + BLE_HOST_EVQ_COUNT;
ble_total_co_count = npl_info->co_count + BLE_HOST_CO_COUNT;
ble_total_sem_count = npl_info->sem_count + BLE_HOST_SEM_COUNT;
ble_total_mutex_count = npl_info->mutex_count + BLE_HOST_MUTEX_COUNT;
ble_freertos_total_event_cnt = ble_total_evt_count;
rc = os_mempool_init(&ble_freertos_ev_pool, BLE_TOTAL_EV_COUNT,
sizeof (struct ble_npl_event_freertos), ble_freertos_ev_buf,
"ble_freertos_ev_pool");
if(rc != 0) {
goto _error;
if (ble_total_evt_count) {
ble_freertos_ev_buf = malloc(OS_MEMPOOL_SIZE(ble_total_evt_count,
sizeof (struct ble_npl_event_freertos)) *
sizeof(os_membuf_t));
if (!ble_freertos_ev_buf) {
goto _error;
}
rc = os_mempool_init(&ble_freertos_ev_pool, ble_total_evt_count,
sizeof (struct ble_npl_event_freertos), ble_freertos_ev_buf,
"ble_freertos_ev_pool");
if (rc) {
goto _error;
}
}
rc = os_mempool_init(&ble_freertos_evq_pool, BLE_TOTAL_EVQ_COUNT,
sizeof (struct ble_npl_eventq_freertos), ble_freertos_evq_buf,
"ble_freertos_evq_pool");
if(rc != 0) {
goto _error;
if (ble_total_evtq_count) {
ble_freertos_evq_buf = malloc(OS_MEMPOOL_SIZE(ble_total_evtq_count,
sizeof (struct ble_npl_eventq_freertos)) *
sizeof(os_membuf_t));
if (!ble_freertos_evq_buf) {
goto _error;
}
rc = os_mempool_init(&ble_freertos_evq_pool, ble_total_evtq_count,
sizeof (struct ble_npl_eventq_freertos), ble_freertos_evq_buf,
"ble_freertos_evq_pool");
if (rc) {
goto _error;
}
}
rc = os_mempool_init(&ble_freertos_co_pool, BLE_TOTAL_CO_COUNT,
sizeof (struct ble_npl_callout_freertos), ble_freertos_co_buf,
"ble_freertos_co_pool");
if(rc != 0) {
goto _error;
if (ble_total_co_count) {
ble_freertos_co_buf = malloc(OS_MEMPOOL_SIZE(ble_total_co_count,
sizeof (struct ble_npl_callout_freertos)) *
sizeof(os_membuf_t));
if (!ble_freertos_co_buf) {
goto _error;
}
rc = os_mempool_init(&ble_freertos_co_pool, ble_total_co_count,
sizeof (struct ble_npl_callout_freertos), ble_freertos_co_buf,
"ble_freertos_co_pool");
if (rc) {
goto _error;
}
}
rc = os_mempool_init(&ble_freertos_sem_pool, BLE_TOTAL_SEM_COUNT,
sizeof (struct ble_npl_sem_freertos), ble_freertos_sem_buf,
"ble_freertos_sem_pool");
if(rc != 0) {
goto _error;
if (ble_total_sem_count) {
ble_freertos_sem_buf = malloc(OS_MEMPOOL_SIZE(ble_total_sem_count,
sizeof (struct ble_npl_sem_freertos)) *
sizeof(os_membuf_t));
if (!ble_freertos_sem_buf) {
goto _error;
}
rc = os_mempool_init(&ble_freertos_sem_pool, ble_total_sem_count,
sizeof (struct ble_npl_sem_freertos), ble_freertos_sem_buf,
"ble_freertos_sem_pool");
if (rc) {
goto _error;
}
}
rc = os_mempool_init(&ble_freertos_mutex_pool, BLE_TOTAL_MUTEX_COUNT,
sizeof (struct ble_npl_mutex_freertos), ble_freertos_mutex_buf,
"ble_freertos_mutex_pool");
if(rc == 0) {
return rc;
if (ble_total_mutex_count) {
ble_freertos_mutex_buf = malloc(OS_MEMPOOL_SIZE(ble_total_mutex_count,
sizeof (struct ble_npl_mutex_freertos)) *
sizeof(os_membuf_t));
if (!ble_freertos_mutex_buf) {
goto _error;
}
rc = os_mempool_init(&ble_freertos_mutex_pool, ble_total_mutex_count,
sizeof (struct ble_npl_mutex_freertos), ble_freertos_mutex_buf,
"ble_freertos_mutex_pool");
if (rc) {
goto _error;
}
}
return 0;
_error:
#if SOC_ESP_NIMBLE_CONTROLLER
if(ble_freertos_ev_buf) {
if (ble_freertos_ev_buf) {
free(ble_freertos_ev_buf);
ble_freertos_ev_buf = NULL;
}
if(ble_freertos_evq_buf) {
if (ble_freertos_evq_buf) {
free(ble_freertos_evq_buf);
ble_freertos_evq_buf = NULL;
}
if(ble_freertos_co_buf) {
if (ble_freertos_co_buf) {
free(ble_freertos_co_buf);
ble_freertos_co_buf = NULL;
}
if(ble_freertos_sem_buf) {
if (ble_freertos_sem_buf) {
free(ble_freertos_sem_buf);
ble_freertos_sem_buf = NULL;
}
if(ble_freertos_mutex_buf) {
if (ble_freertos_mutex_buf) {
free(ble_freertos_mutex_buf);
ble_freertos_mutex_buf = NULL;
}
return -1;
#else
BLE_LL_ASSERT(rc == 0);
return rc;
#endif
}
void npl_freertos_mempool_deinit(void)
{
#if SOC_ESP_NIMBLE_CONTROLLER
if(ble_freertos_ev_buf) {
if (ble_freertos_ev_buf) {
free(ble_freertos_ev_buf);
ble_freertos_ev_buf = NULL;
}
if(ble_freertos_evq_buf) {
if (ble_freertos_evq_buf) {
free(ble_freertos_evq_buf);
ble_freertos_evq_buf = NULL;
}
if(ble_freertos_co_buf) {
if (ble_freertos_co_buf) {
free(ble_freertos_co_buf);
ble_freertos_co_buf = NULL;
}
if(ble_freertos_sem_buf) {
if (ble_freertos_sem_buf) {
free(ble_freertos_sem_buf);
ble_freertos_sem_buf = NULL;
}
if(ble_freertos_mutex_buf) {
if (ble_freertos_mutex_buf) {
free(ble_freertos_mutex_buf);
ble_freertos_mutex_buf = NULL;
}
#endif
}
void npl_freertos_funcs_deinit(void)

1
components/esp_rom/esp32c2/ld/esp32c2.rom.ld
View File

@ -1138,7 +1138,6 @@ r_ble_lll_conn_get_next_sched_time = 0x40001524;
r_ble_lll_conn_halt = 0x4000152c;
r_ble_lll_conn_master_common_init = 0x40001530;
r_ble_lll_conn_master_new = 0x40001534;
r_ble_lll_conn_module_deinit = 0x40001538;
r_ble_lll_conn_module_reset = 0x40001540;
r_ble_lll_conn_pre_process = 0x40001548;
r_ble_lll_conn_process_acked_pdu = 0x4000154c;

4
components/hal/esp32h4/include/hal/clk_gate_ll.h
View File

@ -68,7 +68,7 @@ static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph)
case PERIPH_ETM_MODULE:
return SYSTEM_ETM_CLK_EN;
case PERIPH_MODEM_RPA_MODULE:
return SYSTEM_BLE_SEC_AAR_CLK_EN;
return SYSTEM_BLE_SEC_BAH_CLK_EN;
default:
return 0;
}
@ -145,7 +145,7 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en
case PERIPH_ETM_MODULE:
return SYSTEM_ETM_RST;
case PERIPH_MODEM_RPA_MODULE:
return SYSTEM_BLE_SEC_AAR_RST;
return SYSTEM_BLE_SEC_BAH_RST;
default:
return 0;
}

20
components/soc/esp32h4/include/rev1/soc/clkrst_reg.h
View File

@ -171,12 +171,12 @@ extern "C" {
#define SYSTEM_BLE_SEC_CLK_EN_M (BIT(17))
#define SYSTEM_BLE_SEC_CLK_EN_V 0x1
#define SYSTEM_BLE_SEC_CLK_EN_S 17
/* SYSTEM_BLE_SEC_AAR_CLK_EN : R/W ;bitpos:[16] ;default: 1'b0 ; */
/* SYSTEM_BLE_SEC_BAH_CLK_EN : R/W ;bitpos:[16] ;default: 1'b0 ; */
/*description: */
#define SYSTEM_BLE_SEC_AAR_CLK_EN (BIT(16))
#define SYSTEM_BLE_SEC_AAR_CLK_EN_M (BIT(16))
#define SYSTEM_BLE_SEC_AAR_CLK_EN_V 0x1
#define SYSTEM_BLE_SEC_AAR_CLK_EN_S 16
#define SYSTEM_BLE_SEC_BAH_CLK_EN (BIT(16))
#define SYSTEM_BLE_SEC_BAH_CLK_EN_M (BIT(16))
#define SYSTEM_BLE_SEC_BAH_CLK_EN_V 0x1
#define SYSTEM_BLE_SEC_BAH_CLK_EN_S 16
/* SYSTEM_BLE_SEC_CCM_CLK_EN : R/W ;bitpos:[15] ;default: 1'b0 ; */
/*description: */
#define SYSTEM_BLE_SEC_CCM_CLK_EN (BIT(15))
@ -293,12 +293,12 @@ extern "C" {
#define SYSTEM_BLE_SEC_RST_M (BIT(18))
#define SYSTEM_BLE_SEC_RST_V 0x1
#define SYSTEM_BLE_SEC_RST_S 18
/* SYSTEM_BLE_SEC_AAR_RST : R/W ;bitpos:[17] ;default: 1'b0 ; */
/* SYSTEM_BLE_SEC_BAH_RST : R/W ;bitpos:[17] ;default: 1'b0 ; */
/*description: */
#define SYSTEM_BLE_SEC_AAR_RST (BIT(17))
#define SYSTEM_BLE_SEC_AAR_RST_M (BIT(17))
#define SYSTEM_BLE_SEC_AAR_RST_V 0x1
#define SYSTEM_BLE_SEC_AAR_RST_S 17
#define SYSTEM_BLE_SEC_BAH_RST (BIT(17))
#define SYSTEM_BLE_SEC_BAH_RST_M (BIT(17))
#define SYSTEM_BLE_SEC_BAH_RST_V 0x1
#define SYSTEM_BLE_SEC_BAH_RST_S 17
/* SYSTEM_BLE_SEC_CCM_RST : R/W ;bitpos:[16] ;default: 1'b0 ; */
/*description: */
#define SYSTEM_BLE_SEC_CCM_RST (BIT(16))

20
components/soc/esp32h4/include/rev2/soc/clkrst_reg.h
View File

@ -327,13 +327,13 @@ extern "C" {
#define SYSTEM_BLE_SEC_CCM_CLK_EN_M (SYSTEM_BLE_SEC_CCM_CLK_EN_V << SYSTEM_BLE_SEC_CCM_CLK_EN_S)
#define SYSTEM_BLE_SEC_CCM_CLK_EN_V 0x00000001U
#define SYSTEM_BLE_SEC_CCM_CLK_EN_S 15
/** SYSTEM_BLE_SEC_AAR_CLK_EN : R/W; bitpos: [16]; default: 0;
/** SYSTEM_BLE_SEC_BAH_CLK_EN : R/W; bitpos: [16]; default: 0;
* Need add description
*/
#define SYSTEM_BLE_SEC_AAR_CLK_EN (BIT(16))
#define SYSTEM_BLE_SEC_AAR_CLK_EN_M (SYSTEM_BLE_SEC_AAR_CLK_EN_V << SYSTEM_BLE_SEC_AAR_CLK_EN_S)
#define SYSTEM_BLE_SEC_AAR_CLK_EN_V 0x00000001U
#define SYSTEM_BLE_SEC_AAR_CLK_EN_S 16
#define SYSTEM_BLE_SEC_BAH_CLK_EN (BIT(16))
#define SYSTEM_BLE_SEC_BAH_CLK_EN_M (SYSTEM_BLE_SEC_BAH_CLK_EN_V << SYSTEM_BLE_SEC_BAH_CLK_EN_S)
#define SYSTEM_BLE_SEC_BAH_CLK_EN_V 0x00000001U
#define SYSTEM_BLE_SEC_BAH_CLK_EN_S 16
/** SYSTEM_BLE_SEC_CLK_EN : R/W; bitpos: [17]; default: 0;
* Need add description
*/
@ -500,13 +500,13 @@ extern "C" {
#define SYSTEM_BLE_SEC_CCM_RST_M (SYSTEM_BLE_SEC_CCM_RST_V << SYSTEM_BLE_SEC_CCM_RST_S)
#define SYSTEM_BLE_SEC_CCM_RST_V 0x00000001U
#define SYSTEM_BLE_SEC_CCM_RST_S 16
/** SYSTEM_BLE_SEC_AAR_RST : R/W; bitpos: [17]; default: 0;
/** SYSTEM_BLE_SEC_BAH_RST : R/W; bitpos: [17]; default: 0;
* Need add description
*/
#define SYSTEM_BLE_SEC_AAR_RST (BIT(17))
#define SYSTEM_BLE_SEC_AAR_RST_M (SYSTEM_BLE_SEC_AAR_RST_V << SYSTEM_BLE_SEC_AAR_RST_S)
#define SYSTEM_BLE_SEC_AAR_RST_V 0x00000001U
#define SYSTEM_BLE_SEC_AAR_RST_S 17
#define SYSTEM_BLE_SEC_BAH_RST (BIT(17))
#define SYSTEM_BLE_SEC_BAH_RST_M (SYSTEM_BLE_SEC_BAH_RST_V << SYSTEM_BLE_SEC_BAH_RST_S)
#define SYSTEM_BLE_SEC_BAH_RST_V 0x00000001U
#define SYSTEM_BLE_SEC_BAH_RST_S 17
/** SYSTEM_BLE_SEC_RST : R/W; bitpos: [18]; default: 0;
* Need add description
*/