songruojing
5f3f615ff1
uart: fixed incorrect channel number on ESP32S2, S3 and C3
2022-03-02 02:56:23 +08:00
Cao Sen Miao
1f980ae982
psram: add ESP32-D0WD-R2-V3 support
2022-02-13 22:31:24 +08:00
weitianhua
b2fba50e78
Remove dummy defines of Classic BT
2021-10-29 14:37:23 +08:00
weitianhua
58ff27cc03
Make Classic BT related document links only visible for ESP32
2021-10-29 14:25:31 +08:00
suda-morris
91fa868bd6
twai: update register struct file
2021-10-12 10:42:04 +08:00
SalimTerryLi
29accf2533
soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
...
Note: on ESP32 UART rxfifo seems to be read as u8 instead of u32 to make it work
2021-10-12 10:42:04 +08:00
Song Ruo Jing
3bcc85d96d
Merge branch 'bugfix/enable_gpio_20_v4.3' into 'release/v4.3'
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gpio: Enable IO20 on ESP32 (backport v4.3)
See merge request espressif/esp-idf!15022
2021-10-09 08:44:17 +00:00
Li Shuai
4f4254537c
esp_hw_support: No voltage drop during light sleep to ensure stable output clock of rtc8m oscillator
2021-09-28 11:20:00 +08:00
Li Shuai
4ef6e37fcb
Power Management: add RTC8M power domain to control whether internal 8m oscillator is powered down during sleep
2021-09-28 11:19:57 +08:00
Alberto García Hierro
68f8b999bb
Enable IO20 on ESP32
...
Some newer ESP32 variants (like ESP32-PICO-V3 and ESP32-PICO-MINI-02)
do implement this pin and it can be used as a normal GPIO.
Fixes #6016
Fixes #6837
Closes https://github.com/espressif/esp-idf/pull/6918
(cherry picked from commit 6deaefde69
)
2021-08-31 20:11:00 +08:00
xiewenxiang
032f6d34d1
component/bt: add local irk to controller
2021-08-06 18:19:25 +08:00
xiewenxiang
192aa18c31
Fixed ESP32 BLE can't resolve the peer address when enable white list
2021-07-30 15:09:00 +08:00
Angus Gratton
22a02656b7
bootloader: Fix selection of Quad I/O modes on ESP32-U4WDH chip
...
Closes https://github.com/espressif/esp-idf/issues/6191
2021-06-07 14:53:43 +10:00
Darian Leung
00801c8044
TWAI: Simply caps and remove unused caps
2021-04-26 19:34:30 +08:00
Armando
670b057b04
spi: remove HSPI macro on esp32c3 and esp32s3
2021-04-06 15:30:28 +08:00
Xia Xiaotian
e5e47ebae6
esp_wifi: store PHY digital registers before disabling PHY and load
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them after enabling PHY
2021-02-26 16:34:10 +08:00
Michael (XIAO Xufeng)
d7d1dee208
system: reset dma when soft reset
2021-01-25 04:51:40 +00:00
Angus Gratton
3532f52f60
Merge branch 'bugfix/ldgen_ignore_nonexistent_archives_and_obj' into 'master'
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ldgen: check mappings
Closes IDF-1624
See merge request espressif/esp-idf!8557
2021-01-21 15:59:35 +08:00
Angus Gratton
fe8a891de9
Merge branch 'feature/support_esp32c3_master_cmake_secure_boot' into 'master'
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bootloader/esp32c3: Support secure boot
Closes IDF-2115
See merge request espressif/esp-idf!11797
2021-01-21 08:42:49 +08:00
KonstantinKondrashov
88c5fe49b8
soc: Adds a soc_caps define for all chips to define the number of boot key digests
2021-01-19 20:51:13 +08:00
Li Shuai
aa7fd175b9
light sleep: light sleep support for esp32c3
2021-01-19 14:50:58 +08:00
Renz Bagaporo
d1c800fbbb
components: fix ldgen check errors
2021-01-19 11:17:18 +08:00
ninh
27aa6c289f
components/pm: Add slp gpio configure workaround
2021-01-15 15:34:45 +08:00
morris
e6d23a35ec
gdma: dynamic alloc DMA channels
2021-01-13 10:52:27 +08:00
ninh
dc7bdb9857
adjust lightsleep overhead time and cali slowclk
2021-01-06 03:40:28 +00:00
Marius Vikhammer
eb788deb03
esp_hw_support: merge C3 changes to master
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Merge RTC related C3 changes to master
2020-12-30 12:20:41 +08:00
Angus Gratton
1b0442b963
Merge branch 'feature/unify_rtc_fast_mem_as_heap_config_across_chips' into 'master'
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esp_system: make rtc fast memory to heap configuration unified across chips
Closes IDF-2503
See merge request espressif/esp-idf!11693
2020-12-29 11:41:05 +08:00
Angus Gratton
c3ba995f2c
Merge branch 'ci/ccomp_performance_tests' into 'master'
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unit_test: Refactor all performance tests that rely on cache compensated timer
See merge request espressif/esp-idf!11709
2020-12-24 13:44:52 +08:00
Mahavir Jain
880a63b2e9
esp_system: make rtc fast memory to heap configuration unified across chips
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Closes IDF-2503
2020-12-24 09:46:35 +05:30
Angus Gratton
705d797b41
Merge branch 'feature/esp32c3_drivers' into 'master'
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driver: Add esp32c3
Closes IDF-2363
See merge request espressif/esp-idf!11650
2020-12-23 08:43:31 +08:00
Angus Gratton
fa892eb017
soc: Explain units for rtc_clk_cal() function, fix typo
2020-12-23 09:53:24 +11:00
Cao Sen Miao
e338a2e3df
rtc: add function to en/disable the rtc clock
2020-12-23 09:53:24 +11:00
Marius Vikhammer
0a95151a75
unit_test: Refactor all performance tests that rely on cache compensated timer
...
There is no ccomp timer on C3, which means our performance tests will start
failing again due to variance caused by cache misses.
This MR adds TEST_PERFORMANCE_CCOMP_ macro that will only fail
performance test if CCOMP timer is supported on the target
2020-12-22 18:56:24 +11:00
boarchuz
06d6146445
fix rtc_gpio_desc_t compilation error
...
Closes https://github.com/espressif/esp-idf/pull/6029
Closes https://github.com/espressif/esp-idf/issues/6301
Closes IDFGH-4470
Closes IDFGH-4167
2020-12-21 13:54:52 +05:30
Cao Sen Miao
0736c91d68
soc: Remove cache constants from soc.h
2020-12-17 15:34:13 +11:00
Marius Vikhammer
457ce080ae
AES: refactor and add HAL layer
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Refactor the AES driver and add HAL, LL and caps.
Add better support for running AES-GCM fully in hardware.
2020-12-10 09:04:47 +00:00
Angus Gratton
c29d93986d
soc: Add initial ESP32-C3 support
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From internal commit 7761d6e8
2020-11-30 11:12:56 +11:00
Armando
fb8b905539
uart: add uart support on esp32s3
2020-11-24 19:12:51 +08:00
morris
c5fe158929
doc: fix wrong register description regarding to ethernet SMI
2020-11-16 13:30:49 +08:00
Michael (XIAO Xufeng)
14944b181e
Merge branch 'fix/soc_caps_spi_dummy_output_esp32' into 'master'
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soc_caps.h: remove spi cap that is defined to 0
See merge request espressif/esp-idf!11203
2020-11-16 10:39:27 +08:00
Michael (XIAO Xufeng)
099fca515d
Merge branch 'bugfix/move_crypto_caps' into 'master'
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SHA/RSA: moved all caps to soc_caps.h
Closes IDF-2300
See merge request espressif/esp-idf!11032
2020-11-13 11:06:44 +08:00
Angus Gratton
935e4b4d62
Merge branch 'feature/riscv_arch' into 'master'
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Add RISC-V support
Closes IDF-2359
See merge request espressif/esp-idf!11140
2020-11-13 07:50:31 +08:00
Angus Gratton
420aef1ffe
Updates for riscv support
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* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
longer signed/unsigned int).
Changes come from internal branch commit a6723fc
2020-11-13 07:49:11 +11:00
Michael (XIAO Xufeng)
caf83b88ba
Merge branch 'feature/bringup_i2c_for_s3' into 'master'
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I2C: Add support for esp32s3 and add source clock allocator
Closes IDF-2011
See merge request espressif/esp-idf!10923
2020-11-12 22:12:58 +08:00
Cao Sen Miao
6eee601cf6
i2c: Add supports on esp32s3
2020-11-12 11:32:45 +08:00
morris
dc227c78e1
rmt: fix wrong signal assign on esp32
2020-11-12 10:31:38 +08:00
Michael (XIAO Xufeng)
5b6c965e99
soc_caps.h: remove spi cap that is defined to 0
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According to the caps rule, for unsupported feature we don't define anything.
Remove the define 0 that violates this rule.
2020-11-12 10:29:42 +08:00
Marius Vikhammer
488f46acf5
SHA/RSA: moved all caps to soc_caps.h
2020-11-12 02:15:46 +00:00
Angus Gratton
66fb5a29bb
Whitespace: Automated whitespace fixes (large commit)
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Apply the pre-commit hook whitespace fixes to all files in the repo.
(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
morris
ff976867b3
rmt: split TX and RX in LL driver
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Split TX and RX function in LL driver.
Channel number is encoded in driver layer.
Added channel signal list in periph.c
2020-11-05 19:00:55 +08:00