Commit Graph

153 Commits

Author SHA1 Message Date
chenjianxing
564068d5af esp_wifi: support esp32s3 wifi and fix not tx 9M rate issue 2021-07-06 11:38:40 +08:00
Shu Chen
ee23a489b9 esp32h2: code clean up 2021-07-01 19:53:50 +08:00
Shu Chen
37f4cb8b4b esp32h2: add rom code for esp32h2 2021-07-01 19:53:11 +08:00
Angus Gratton
57fa883127 esp32s3: Remove APB frequency RTC register
Usage of this register changed between ESP32-S3 beta2 and the
final chip.
2021-06-29 17:38:46 +10:00
Michael (XIAO Xufeng)
afc2bc94b3 Merge branch 'feature/add_opi_flash_psram_support' into 'master'
spi flash: opi flash psram support and spi timing tuning  support on 727

Closes IDF-3097

See merge request espressif/esp-idf!12946
2021-06-28 01:59:19 +00:00
Armando
bc248278f8 spiflash: add octal spi psram support on 727 2021-06-25 19:41:57 +08:00
Jiang Jiang Jian
dd1352dec3 Merge branch 'bugfix/fix_amsdu_fragment_vulnerability' into 'master'
esp_wifi: fix amsdu & fragment vulnerabilities

Closes WIFI-3700 and WIFI-3733

See merge request espressif/esp-idf!13719
2021-06-22 13:00:42 +00:00
Ivan Grokhotkov
bdb01b8285 Merge branch 'bugfix/longjmp_s3' into 'master'
[esp_rom]: fixed S3 longjmp patch

Closes IDF-3391

See merge request espressif/esp-idf!13946
2021-06-22 04:00:51 +00:00
Jakob Hasse
e32831033a [esp_rom]: fixed S3 longjmp patch
* On S3, the placement of ROM functions is
  ECO-dependent. Hence, we don't jump into
  the middle of the longjmp function in ROM
  on S3 anymore.
  Instead, the whole longjump function is used
  in the patch.

* Also properly excluded the patch from
  bootloader build with Makefiles

Closes IDF-3391
2021-06-18 15:47:41 +08:00
Cao Sen Miao
f2fe0847d5 usb_serial_jtag: add initial support for S3 (including flashing, monitoring, writing, and reading) but console is not avaliable now 2021-06-18 12:42:41 +08:00
ChenJianxing
ef127ab9dd esp_wifi: fix amsdu & fragment vulnerabilities 2021-06-17 10:11:33 +08:00
Marius Vikhammer
f124536948 system: add support for reset reason hint on S3 2021-06-15 13:39:51 +08:00
Marius Vikhammer
79b5dedeb1 CI: minor testcases fixes and disable some cases that cant run on S3 2021-06-15 13:39:48 +08:00
Angus Gratton
bc4eb2071c Merge branch 'feature/toolchain_2021r1' into 'master'
Bring 2021r1 toolchains

Closes IDFGH-5009

See merge request espressif/esp-idf!13554
2021-06-09 05:06:23 +00:00
Anton Maklakov
b46b50eaa6 newlib: Add ESP_ROM_HAS_RETARGETABLE_LOCKING capability for C3 and S3 chips 2021-06-07 12:53:45 +07:00
Marius Vikhammer
19a492bc8d soc: add base support for ESP32-S3
Updates the following with changes from verification branches:

 * esp_rom linker files
 * rtc_cntl and system reg and struct headers

Also updates:
 * GDMA driver with new register layout
 * esptool submodule commit
2021-06-07 10:40:14 +08:00
liaowenhao
6bd7f30199 bugfix/fix crash when lmp flooding 2021-05-24 12:08:03 +08:00
Angus Gratton
9235754d4c esp_rom: Allow passing any type of data pointer to md5, remove unchecked size on digest pointer 2021-05-18 01:32:59 +00:00
Angus Gratton
ede477ea65 paritition_table: Verify the partition table md5sum when loading the app
Additionally, always enable the partition MD5 check if flash encryption is on in
Release mode. This ensures the partition table ciphertext has not been modified
(CVE-2021-27926).

The exception is pre-V3.1 ESP-IDF bootloaders and partition tables, which
don't have support for the MD5 entry.
2021-05-18 01:32:59 +00:00
Cao Sen Miao
8c5819dccb usb_serial_jtag: fix the bug that cannot write with usb_jtag 2021-05-13 13:40:01 +08:00
Michael (XIAO Xufeng)
a0d13a31ec uart: fix misleading files for UART2
Includes: header files, ld files and clk.c

ESP32-C3 only have UART0 and UART1.
2021-04-27 17:40:19 +08:00
Jakob Hasse
fc22e3c645 [system]: Made longjmp save for context switch
* Patched longjmp to be context-switch safe
  longjmp modifies the windowbase and windowstart
  registers, which isn't safe if a context switch
  occurs during the modification. After a context
  switch, windowstart and windowbase will be
  different, leading to a wrongly set windowstart
  bit due to longjmp writing it based on the
  windowbase before the context switch. This
  corrupts the registers at the next window
  overflow reaching that wrongly set bit.

  The solution is to disable interrupts during
  this code. It is only 6 instructions long,
  the impact shouldn't be significant.

  The fix is implemented as a wrapper which
  replaces the original first instructions of
  longjmp which are buggy. Then, it jumps back
  to execute the rest of the original longjmp
  function.

  Added a comparably reliable test to the
  test apps.
2021-04-23 15:55:31 +08:00
ChenJianxing
dd14e97375 esp_wifi: support esp32s3 beta3 wifi 2021-04-16 00:38:20 +08:00
Marius Vikhammer
b4d2fb56a0 ci: enable previously disabled unit tests 2021-03-29 18:36:41 +08:00
alex.li
55cbb541fc Support new section addr and wifi lib for ESP32C3-ECO3. 2021-03-29 10:27:10 +08:00
Marius Vikhammer
2aead8ba57 Support ESP32S3 Beta 3 target
Update ROM API. Port changes from bringup branch.
2021-03-18 10:24:22 +08:00
Angus Gratton
6a29b45bd4 secure boot v2: Fix issue checking multiple signature blocks on OTA update 2021-03-15 12:30:20 +00:00
KonstantinKondrashov
95564b4687 secure_boot: Secure Boot V2 verify app signature on update (without Secure boot)
- ESP32 ECO3, ESP32-S2/C3/S3
2021-03-15 12:30:20 +00:00
ChenJianxing
0a8ba88145 esp_wifi: optimization wifi rate
1.support disable 11b rate
2.support config espnow rate
3.fix sta negotiate phymode issue
4.update ftm rate
2021-02-25 10:21:46 +00:00
dongyou
059ffa6daf change rom function for esp32c3 to fix eb lldesc size issue 2021-02-24 17:45:07 +08:00
morris
bf2480f62d efuse: can disable boot ROM log from Kconfig 2021-02-22 20:56:43 +08:00
morris
0f5d1c1c46 rtc: supported disable rom log temporarily 2021-02-22 20:56:43 +08:00
Angus Gratton
49c442b12f Merge branch 'feature/efuse_update_description' into 'master'
efuse: Updates description of uart_print_control efuse

Closes IDF-2705

See merge request espressif/esp-idf!12236
2021-02-09 11:02:26 +08:00
Xia Xiaotian
b71481093a esp_wifi: fix some Wi-Fi scan and coexist bugs
1. Fix the bug that Wi-Fi performance is impacted by BLE starting scan for a while in some scenarios on ESP32-C3.

2. Fix the bug that Wi-Fi performance is impacted when Bluetooth change state for a while in some scenarios on ESP32-C3.

3. Fix the bug that BLE performance is impacted by Wi-Fi scan on ESP32-C3.

4. Fix the bug that Wi-Fi scan fails when BLE is scanning on ESP32-C3.

5. Fix Wi-Fi ACK and CTS rate when low rate is disabled on ESP32-C3.
2021-02-08 21:20:09 +08:00
KonstantinKondrashov
43ebb8ea61 efuse: Updates description of uart_print_control efuse 2021-02-08 18:02:55 +08:00
Jiang Jiang Jian
d1cc9e98b7 Merge branch 'bugfix/fix_wifi_connect_fail' into 'master'
WiFi: fix the bug that wifi connect fail for ESP32C3

See merge request espressif/esp-idf!12308
2021-02-06 02:35:43 +08:00
Jack
2859c7ebd1 fix the bug that wifi connect fail 2021-02-06 00:12:37 +08:00
Cao Sen Miao
c1b41ece32 flash_encryption: Quick fixed the issue that block when flash_encryption_write, Related https://github.com/espressif/esp-idf/issues/6322, Related https://github.com/espressif/esp-idf/issues/6254 2021-02-05 20:10:42 +08:00
Jiang Jiang Jian
28faf93c51 Merge branch 'feature/esp32c3_power_down' into 'master'
esp32c3 : power down MAC and BB only if both Wi-Fi and BT power down

Closes FC3-99

See merge request espressif/esp-idf!12076
2021-01-28 23:27:19 +08:00
baohongde
eef66789d4 Mac BB power down in light sleep
components/bt: Do not use feature: timer support isr dispatch method

disable controller after wake up finished.

protect critical section of power down

choose clk in sleep

components/coex: mac bb power down in light sleep

components/coex: Macro changed

components/os: protect reserved interrupt number

update phy to phy_version 300,6e46ba7,Jan 25 2021

some bugfix
2021-01-28 22:28:04 +08:00
Ivan Grokhotkov
9a20283485 Merge branch 'bugfix/scan_test_missing_build_apps_without_tests' into 'master'
ci: bugfix: scan_test missing build apps without tests

See merge request espressif/esp-idf!12138
2021-01-28 17:48:24 +08:00
wangmengyang
51be1af028 add coexist hook functions and fix bugs for coexistence 2021-01-27 06:37:04 +00:00
Fu Hanxi
e4e375f488 fix: add spi_flash.h for s2, s3, c3 targets in cpu_start.c
update s2, s3, c3 ld files spi_flash_attach to esp_rom_spiflash_attach
2021-01-27 12:35:49 +08:00
Angus Gratton
fe8a891de9 Merge branch 'feature/support_esp32c3_master_cmake_secure_boot' into 'master'
bootloader/esp32c3: Support secure boot

Closes IDF-2115

See merge request espressif/esp-idf!11797
2021-01-21 08:42:49 +08:00
Li Shuai
27ddbf5fcc light sleep: libphy optimization for esp32c3 2021-01-20 13:28:30 +08:00
KonstantinKondrashov
98f726fa4b bootloader/esp32c3: Adds secure boot (not yet supported) 2021-01-19 20:51:13 +08:00
zwj
7c1c669799 component/bt: add BLE v5.0 feature for bluedroid host 2021-01-15 17:55:12 +08:00
Chen Jian Xing
5b44295cb9 esp_wifi: fix esp32c3 code issues
1. enable wifi clk and rm dport header
2.syn phy_init_data.h from esp32
2021-01-10 16:16:28 +08:00
Ivan Grokhotkov
b7b9ea4361 newlib: add _RETARGETABLE_LOCKING support
This adds support for the retargetable locking implementation in
newlib 3. This feature will be enabled in the future toolchain builds.
With the present version of the toolchain, this code doesn't get used.

When _RETARGETABLE_LOCKING gets enabled, newlib locking implementation
will be modified as follows:

- Legacy ESP-specific _lock_xxx functions are preserved. This is done
  because ROM copies of newlib in ESP32 and ESP32-S2 rely on these
  functions through the function pointer table. Also there is some
  code in IDF which still uses these locking functions.

- New __retarget_lock_xxx functions are introduced. Newlib expects
  these functions to be provided by the system. These functions work
  pretty much the same way as the ESP-specific _lock_xxx functions,
  except one major difference: _lock_acquire receives the lock pointer
  by value, and as such doesn't support lazy initialization.

- Static locks used by newlib are now explicitly initialized at
  startup. Since it is unlikely that these static locks are used at
  the same time, all compatible locks are set to point to the same
  mutex. This saves a bit of RAM. Note that there are still many locks
  not initialized statically, in particular those inside FILE
  structures.
2020-12-29 16:18:04 +01:00
Marius Vikhammer
4ff8c7ae98 esp_rom/esp_system: Add flag for ROM multiple UART output, esp32c3 console
From internal commit 6d894813
2020-12-24 14:18:01 +11:00