2017-12-16 21:19:51 -05:00
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/**
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* About test environment UT_T1_GPIO:
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* Please connect GPIO18 and GPIO19
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*/
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#include <stdio.h>
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#include <string.h>
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2019-08-06 05:59:26 -04:00
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2017-12-16 21:19:51 -05:00
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#include "esp_system.h"
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#include "esp_sleep.h"
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#include "unity.h"
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#include "driver/gpio.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/queue.h"
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2019-08-06 05:59:26 -04:00
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#include "sdkconfig.h"
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2020-07-13 09:33:23 -04:00
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#include "esp_rom_uart.h"
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2020-07-21 01:07:34 -04:00
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#include "esp_rom_sys.h"
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2017-12-16 21:19:51 -05:00
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2020-08-20 00:22:36 -04:00
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2018-06-03 22:34:23 -04:00
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#define WAKE_UP_IGNORE 1 // gpio_wakeup function development is not completed yet, set it deprecated.
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2020-02-25 04:41:50 -05:00
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2019-11-26 07:00:24 -05:00
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#if CONFIG_IDF_TARGET_ESP32
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2020-02-25 04:41:50 -05:00
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#define TEST_GPIO_EXT_OUT_IO 18 // default output GPIO
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#define TEST_GPIO_EXT_IN_IO 19 // default input GPIO
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#define TEST_GPIO_OUTPUT_PIN 23
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#define TEST_GPIO_INPUT_ONLY_PIN 34
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#define TEST_GPIO_OUTPUT_MAX GPIO_NUM_34
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2020-01-16 22:47:08 -05:00
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#elif CONFIG_IDF_TARGET_ESP32S2
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2019-11-26 07:00:24 -05:00
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// ESP32_S2 DEVKIC uses IO19 and IO20 as USB functions, so it is necessary to avoid using IO19, otherwise GPIO io pull up/down function cannot pass
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2020-02-25 04:41:50 -05:00
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// Also the first version of ESP32-S2-Saola has pullup issue on GPIO18, which is tied to 3V3 on the
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// runner. Also avoid using GPIO18.
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#define TEST_GPIO_EXT_OUT_IO 17 // default output GPIO
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#define TEST_GPIO_EXT_IN_IO 21 // default input GPIO
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2020-10-14 01:06:54 -04:00
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#define TEST_GPIO_OUTPUT_PIN 12
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2020-02-25 04:41:50 -05:00
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#define TEST_GPIO_INPUT_ONLY_PIN 46
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#define TEST_GPIO_OUTPUT_MAX GPIO_NUM_46
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2020-12-16 04:03:48 -05:00
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#elif CONFIG_IDF_TARGET_ESP32S3
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#define TEST_GPIO_EXT_OUT_IO 19 // default output GPIO
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#define TEST_GPIO_EXT_IN_IO 20 // default input GPIO
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#define TEST_GPIO_OUTPUT_PIN 12
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#define TEST_GPIO_INPUT_ONLY_PIN 46
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#define TEST_GPIO_OUTPUT_MAX GPIO_NUM_MAX
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2020-12-16 04:03:48 -05:00
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#elif CONFIG_IDF_TARGET_ESP32C3
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#define TEST_GPIO_EXT_OUT_IO 2 // default output GPIO
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#define TEST_GPIO_EXT_IN_IO 3 // default input GPIO
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#define TEST_GPIO_OUTPUT_PIN 1
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#define TEST_GPIO_OUTPUT_MAX GPIO_NUM_21
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2019-11-26 07:00:24 -05:00
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#endif
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2020-02-25 04:41:50 -05:00
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2020-12-16 04:03:48 -05:00
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// define public test io on all boards(esp32, esp32s2, esp32s3, esp32c3)
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#define TEST_IO_9 GPIO_NUM_9
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#define TEST_IO_10 GPIO_NUM_10
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2017-12-16 21:19:51 -05:00
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static volatile int disable_intr_times = 0; // use this to calculate how many times it go into interrupt
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static volatile int level_intr_times = 0; // use this to get how many times the level interrupt happened
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static volatile int edge_intr_times = 0; // use this to get how many times the edge interrupt happened
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2018-06-03 22:34:23 -04:00
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#if !WAKE_UP_IGNORE
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2017-12-16 21:19:51 -05:00
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static bool wake_up_result = false; // use this to judge the wake up event happen or not
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2018-06-03 22:34:23 -04:00
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#endif
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2017-12-16 21:19:51 -05:00
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2020-02-25 04:41:50 -05:00
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2017-12-16 21:19:51 -05:00
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/**
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* do some initialization operation in this function
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* @param num: it is the destination GPIO wanted to be initialized
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*
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*/
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static gpio_config_t init_io(gpio_num_t num)
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{
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2020-02-25 04:41:50 -05:00
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TEST_ASSERT(num < TEST_GPIO_OUTPUT_MAX);
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2017-12-16 21:19:51 -05:00
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gpio_config_t io_conf;
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2020-06-19 00:00:58 -04:00
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io_conf.intr_type = GPIO_INTR_DISABLE;
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2017-12-16 21:19:51 -05:00
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io_conf.mode = GPIO_MODE_OUTPUT;
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io_conf.pin_bit_mask = (1ULL << num);
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io_conf.pull_down_en = 0;
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io_conf.pull_up_en = 0;
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return io_conf;
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}
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2020-12-16 04:03:48 -05:00
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
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2020-01-02 01:25:33 -05:00
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//No runners
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2017-12-16 21:19:51 -05:00
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// edge interrupt event
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static void gpio_isr_edge_handler(void* arg)
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{
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uint32_t gpio_num = (uint32_t) arg;
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2020-07-21 01:07:34 -04:00
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esp_rom_printf("GPIO[%d] intr, val: %d\n", gpio_num, gpio_get_level(gpio_num));
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2017-12-16 21:19:51 -05:00
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edge_intr_times++;
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}
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// level interrupt event with "gpio_intr_disable"
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static void gpio_isr_level_handler(void* arg)
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{
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uint32_t gpio_num = (uint32_t) arg;
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disable_intr_times++;
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2020-07-21 01:07:34 -04:00
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esp_rom_printf("GPIO[%d] intr, val: %d, disable_intr_times = %d\n", gpio_num, gpio_get_level(gpio_num), disable_intr_times);
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2017-12-16 21:19:51 -05:00
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gpio_intr_disable(gpio_num);
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}
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// level interrupt event
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static void gpio_isr_level_handler2(void* arg)
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{
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uint32_t gpio_num = (uint32_t) arg;
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level_intr_times++;
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2020-07-21 01:07:34 -04:00
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esp_rom_printf("GPIO[%d] intr, val: %d\n", gpio_num, gpio_get_level(gpio_num));
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2017-12-16 21:19:51 -05:00
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if(gpio_get_level(gpio_num)) {
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2020-02-25 04:41:50 -05:00
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gpio_set_level(TEST_GPIO_EXT_OUT_IO, 0);
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2017-12-16 21:19:51 -05:00
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}else{
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2020-02-25 04:41:50 -05:00
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gpio_set_level(TEST_GPIO_EXT_OUT_IO, 1);
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2017-12-16 21:19:51 -05:00
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}
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2020-07-21 01:07:34 -04:00
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esp_rom_printf("GPIO[%d] intr, val: %d, level_intr_times = %d\n", TEST_GPIO_EXT_OUT_IO, gpio_get_level(TEST_GPIO_EXT_OUT_IO), level_intr_times);
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esp_rom_printf("GPIO[%d] intr, val: %d, level_intr_times = %d\n", gpio_num, gpio_get_level(gpio_num), level_intr_times);
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2017-12-16 21:19:51 -05:00
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}
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2020-12-16 04:03:48 -05:00
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#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
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2017-12-16 21:19:51 -05:00
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2018-06-03 22:34:23 -04:00
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#if !WAKE_UP_IGNORE
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2017-12-16 21:19:51 -05:00
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// get result of waking up or not
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static void sleep_wake_up(void *arg)
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{
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2020-02-25 04:41:50 -05:00
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gpio_config_t io_config = init_io(TEST_GPIO_EXT_IN_IO);
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2017-12-16 21:19:51 -05:00
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io_config.mode = GPIO_MODE_INPUT;
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gpio_config(&io_config);
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2020-02-25 04:41:50 -05:00
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TEST_ESP_OK(gpio_wakeup_enable(TEST_GPIO_EXT_IN_IO, GPIO_INTR_HIGH_LEVEL));
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2017-12-16 21:19:51 -05:00
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esp_light_sleep_start();
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wake_up_result = true;
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}
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// wake up light sleep event
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static void trigger_wake_up(void *arg)
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{
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2020-02-25 04:41:50 -05:00
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gpio_config_t io_config = init_io(TEST_GPIO_EXT_OUT_IO);
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2017-12-16 21:19:51 -05:00
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gpio_config(&io_config);
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2020-02-25 04:41:50 -05:00
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gpio_set_level(TEST_GPIO_EXT_OUT_IO, 0);
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2017-12-16 21:19:51 -05:00
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gpio_install_isr_service(0);
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2020-02-25 04:41:50 -05:00
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gpio_isr_handler_add(TEST_GPIO_EXT_OUT_IO, gpio_isr_level_handler, (void*) TEST_GPIO_EXT_IN_IO);
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gpio_set_level(TEST_GPIO_EXT_OUT_IO, 1);
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2017-12-16 21:19:51 -05:00
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vTaskDelay(100 / portTICK_RATE_MS);
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}
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2020-12-16 04:03:48 -05:00
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#endif //!WAKE_UP_IGNORE
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2017-12-16 21:19:51 -05:00
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static void prompt_to_continue(const char* str)
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{
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printf("%s , please press \"Enter\" to go on!\n", str);
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char sign[5] = {0};
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while(strlen(sign) == 0) {
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/* Flush anything already in the RX buffer */
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2020-07-13 09:33:23 -04:00
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while(esp_rom_uart_rx_one_char((uint8_t *) sign) == ETS_OK) {
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2017-12-16 21:19:51 -05:00
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}
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/* Read line */
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2020-07-13 09:33:23 -04:00
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esp_rom_uart_rx_string((uint8_t*) sign, sizeof(sign) - 1);
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2017-12-16 21:19:51 -05:00
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}
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}
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static void drive_capability_set_get(gpio_num_t num, gpio_drive_cap_t capability)
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{
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gpio_config_t pad_io = init_io(num);
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TEST_ESP_OK(gpio_config(&pad_io));
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TEST_ASSERT(gpio_set_drive_capability(num, GPIO_DRIVE_CAP_MAX) == ESP_ERR_INVALID_ARG);
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gpio_drive_cap_t cap;
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TEST_ESP_OK(gpio_set_drive_capability(num, capability));
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TEST_ESP_OK(gpio_get_drive_capability(num, &cap));
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TEST_ASSERT_EQUAL_INT(cap, capability);
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}
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// test the basic configuration function with right parameters and error parameters
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TEST_CASE("GPIO config parameters test", "[gpio]")
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{
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//error param test
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2021-05-06 04:20:54 -04:00
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//ESP32 test 41 bit, ESP32-S2 test 48 bit, ESP32-S3 test 49 bit
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2020-10-14 01:06:54 -04:00
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gpio_config_t io_config = { 0 };
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2020-06-19 00:00:58 -04:00
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io_config.intr_type = GPIO_INTR_DISABLE;
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2017-12-16 21:19:51 -05:00
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io_config.pin_bit_mask = ((uint64_t)1<<(GPIO_NUM_MAX+1));
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TEST_ASSERT(gpio_config(&io_config) == ESP_ERR_INVALID_ARG);
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// test 0
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io_config.pin_bit_mask = 0;
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TEST_ASSERT(gpio_config(&io_config) == ESP_ERR_INVALID_ARG);
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2021-05-06 04:20:54 -04:00
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//ESP32 test 40 bit, ESP32-S2 test 47 bit, ESP32-S3 test 48 bit
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2017-12-16 21:19:51 -05:00
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io_config.pin_bit_mask = ((uint64_t)1<<GPIO_NUM_MAX);
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TEST_ASSERT(gpio_config(&io_config) == ESP_ERR_INVALID_ARG);
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2020-02-25 04:41:50 -05:00
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io_config.pin_bit_mask = ((uint64_t)1<<TEST_GPIO_OUTPUT_PIN);
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2017-12-16 21:19:51 -05:00
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TEST_ESP_OK(gpio_config(&io_config));
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2020-12-16 04:03:48 -05:00
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//This IO is just used for input, C3 doesn't have input only pin.
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#if !CONFIG_IDF_TARGET_ESP32C3
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2020-02-25 04:41:50 -05:00
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io_config.pin_bit_mask = ((uint64_t)1 << TEST_GPIO_INPUT_ONLY_PIN);
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2017-12-16 21:19:51 -05:00
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io_config.mode = GPIO_MODE_INPUT;
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TEST_ESP_OK(gpio_config(&io_config));
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io_config.mode = GPIO_MODE_OUTPUT;
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2020-02-25 04:41:50 -05:00
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// The pin is input only, once set as output should log something
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2019-11-26 07:00:24 -05:00
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TEST_ASSERT(gpio_config(&io_config) == ESP_ERR_INVALID_ARG);
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2020-12-16 04:03:48 -05:00
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#endif //!CONFIG_IDF_TARGET_ESP32C3
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2017-12-16 21:19:51 -05:00
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}
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2020-12-16 04:03:48 -05:00
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
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2020-01-02 01:25:33 -05:00
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//No runners
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2017-12-16 21:19:51 -05:00
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TEST_CASE("GPIO rising edge interrupt test", "[gpio][test_env=UT_T1_GPIO]")
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{
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edge_intr_times = 0; // set it as 0 prepare to test
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//init input and output gpio
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2020-02-25 04:41:50 -05:00
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gpio_config_t output_io = init_io(TEST_GPIO_EXT_OUT_IO);
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gpio_config_t input_io = init_io(TEST_GPIO_EXT_IN_IO);
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2017-12-16 21:19:51 -05:00
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input_io.intr_type = GPIO_INTR_POSEDGE;
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input_io.mode = GPIO_MODE_INPUT;
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input_io.pull_up_en = 1;
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TEST_ESP_OK(gpio_config(&output_io));
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TEST_ESP_OK(gpio_config(&input_io));
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2020-02-25 04:41:50 -05:00
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TEST_ESP_OK(gpio_set_level(TEST_GPIO_EXT_OUT_IO, 0));
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2017-12-16 21:19:51 -05:00
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//rising edge intr
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2020-02-25 04:41:50 -05:00
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TEST_ESP_OK(gpio_set_intr_type(TEST_GPIO_EXT_IN_IO, GPIO_INTR_POSEDGE));
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2017-12-16 21:19:51 -05:00
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TEST_ESP_OK(gpio_install_isr_service(0));
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2020-02-25 04:41:50 -05:00
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gpio_isr_handler_add(TEST_GPIO_EXT_IN_IO, gpio_isr_edge_handler, (void*)TEST_GPIO_EXT_IN_IO);
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TEST_ESP_OK(gpio_set_level(TEST_GPIO_EXT_OUT_IO, 1));
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2017-12-16 21:19:51 -05:00
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TEST_ASSERT_EQUAL_INT(edge_intr_times, 1);
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vTaskDelay(100 / portTICK_RATE_MS);
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2020-02-25 04:41:50 -05:00
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gpio_isr_handler_remove(TEST_GPIO_EXT_IN_IO);
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2017-12-16 21:19:51 -05:00
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gpio_uninstall_isr_service();
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}
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TEST_CASE("GPIO falling edge interrupt test", "[gpio][test_env=UT_T1_GPIO]")
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{
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edge_intr_times = 0;
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2020-02-25 04:41:50 -05:00
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gpio_config_t output_io = init_io(TEST_GPIO_EXT_OUT_IO);
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gpio_config_t input_io = init_io(TEST_GPIO_EXT_IN_IO);
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2017-12-16 21:19:51 -05:00
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input_io.intr_type = GPIO_INTR_POSEDGE;
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input_io.mode = GPIO_MODE_INPUT;
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input_io.pull_up_en = 1;
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TEST_ESP_OK(gpio_config(&output_io));
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TEST_ESP_OK(gpio_config(&input_io));
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2020-02-25 04:41:50 -05:00
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TEST_ESP_OK(gpio_set_level(TEST_GPIO_EXT_OUT_IO, 1));
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2017-12-16 21:19:51 -05:00
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2020-02-25 04:41:50 -05:00
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gpio_set_intr_type(TEST_GPIO_EXT_IN_IO, GPIO_INTR_NEGEDGE);
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2017-12-16 21:19:51 -05:00
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gpio_install_isr_service(0);
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2020-02-25 04:41:50 -05:00
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gpio_isr_handler_add(TEST_GPIO_EXT_IN_IO, gpio_isr_edge_handler, (void*) TEST_GPIO_EXT_IN_IO);
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gpio_set_level(TEST_GPIO_EXT_OUT_IO, 0);
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2017-12-16 21:19:51 -05:00
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vTaskDelay(100 / portTICK_RATE_MS);
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TEST_ASSERT_EQUAL_INT(edge_intr_times, 1);
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vTaskDelay(100 / portTICK_RATE_MS);
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2020-02-25 04:41:50 -05:00
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gpio_isr_handler_remove(TEST_GPIO_EXT_IN_IO);
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2017-12-16 21:19:51 -05:00
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gpio_uninstall_isr_service();
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}
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TEST_CASE("GPIO both rising and falling edge interrupt test", "[gpio][test_env=UT_T1_GPIO]")
|
|
|
|
{
|
|
|
|
edge_intr_times = 0;
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_config_t output_io = init_io(TEST_GPIO_EXT_OUT_IO);
|
|
|
|
gpio_config_t input_io = init_io(TEST_GPIO_EXT_IN_IO);
|
2017-12-16 21:19:51 -05:00
|
|
|
input_io.intr_type = GPIO_INTR_POSEDGE;
|
|
|
|
input_io.mode = GPIO_MODE_INPUT;
|
|
|
|
input_io.pull_up_en = 1;
|
|
|
|
TEST_ESP_OK(gpio_config(&output_io));
|
|
|
|
TEST_ESP_OK(gpio_config(&input_io));
|
2020-02-25 04:41:50 -05:00
|
|
|
TEST_ESP_OK(gpio_set_level(TEST_GPIO_EXT_OUT_IO, 0));
|
2017-12-16 21:19:51 -05:00
|
|
|
int level = 0;
|
|
|
|
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_intr_type(TEST_GPIO_EXT_IN_IO, GPIO_INTR_ANYEDGE);
|
2017-12-16 21:19:51 -05:00
|
|
|
gpio_install_isr_service(0);
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_isr_handler_add(TEST_GPIO_EXT_IN_IO, gpio_isr_edge_handler, (void*) TEST_GPIO_EXT_IN_IO);
|
2017-12-16 21:19:51 -05:00
|
|
|
// for rising edge in GPIO_INTR_ANYEDGE
|
|
|
|
while(1) {
|
|
|
|
level = level + 1;
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_level(TEST_GPIO_EXT_OUT_IO, level*0.2);
|
2017-12-16 21:19:51 -05:00
|
|
|
if(level > 10) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
|
|
|
}
|
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
|
|
|
// for falling rdge in GPIO_INTR_ANYEDGE
|
|
|
|
while(1) {
|
|
|
|
level = level - 1;
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_level(TEST_GPIO_EXT_OUT_IO, level/5);
|
2017-12-16 21:19:51 -05:00
|
|
|
if(level < 0) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
|
|
|
}
|
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
|
|
|
TEST_ASSERT_EQUAL_INT(edge_intr_times, 2);
|
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_isr_handler_remove(TEST_GPIO_EXT_IN_IO);
|
2017-12-16 21:19:51 -05:00
|
|
|
gpio_uninstall_isr_service();
|
|
|
|
}
|
|
|
|
|
|
|
|
TEST_CASE("GPIO input high level trigger, cut the interrupt source exit interrupt test", "[gpio][test_env=UT_T1_GPIO]")
|
|
|
|
{
|
|
|
|
level_intr_times=0;
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_config_t output_io = init_io(TEST_GPIO_EXT_OUT_IO);
|
|
|
|
gpio_config_t input_io = init_io(TEST_GPIO_EXT_IN_IO);
|
2017-12-16 21:19:51 -05:00
|
|
|
input_io.intr_type = GPIO_INTR_POSEDGE;
|
|
|
|
input_io.mode = GPIO_MODE_INPUT;
|
|
|
|
input_io.pull_up_en = 1;
|
|
|
|
TEST_ESP_OK(gpio_config(&output_io));
|
|
|
|
TEST_ESP_OK(gpio_config(&input_io));
|
2020-02-25 04:41:50 -05:00
|
|
|
TEST_ESP_OK(gpio_set_level(TEST_GPIO_EXT_OUT_IO, 0));
|
2017-12-16 21:19:51 -05:00
|
|
|
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_intr_type(TEST_GPIO_EXT_IN_IO, GPIO_INTR_HIGH_LEVEL);
|
2017-12-16 21:19:51 -05:00
|
|
|
gpio_install_isr_service(0);
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_isr_handler_add(TEST_GPIO_EXT_IN_IO, gpio_isr_level_handler2, (void*) TEST_GPIO_EXT_IN_IO);
|
|
|
|
gpio_set_level(TEST_GPIO_EXT_OUT_IO, 1);
|
2017-12-16 21:19:51 -05:00
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(level_intr_times, 1, "go into high-level interrupt more than once with cur interrupt source way");
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_isr_handler_remove(TEST_GPIO_EXT_IN_IO);
|
2017-12-16 21:19:51 -05:00
|
|
|
gpio_uninstall_isr_service();
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
TEST_CASE("GPIO low level interrupt test", "[gpio][test_env=UT_T1_GPIO]")
|
|
|
|
{
|
|
|
|
disable_intr_times=0;
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_config_t output_io = init_io(TEST_GPIO_EXT_OUT_IO);
|
|
|
|
gpio_config_t input_io = init_io(TEST_GPIO_EXT_IN_IO);
|
2017-12-16 21:19:51 -05:00
|
|
|
input_io.intr_type = GPIO_INTR_POSEDGE;
|
|
|
|
input_io.mode = GPIO_MODE_INPUT;
|
|
|
|
input_io.pull_up_en = 1;
|
|
|
|
TEST_ESP_OK(gpio_config(&output_io));
|
|
|
|
TEST_ESP_OK(gpio_config(&input_io));
|
2020-02-25 04:41:50 -05:00
|
|
|
TEST_ESP_OK(gpio_set_level(TEST_GPIO_EXT_OUT_IO, 1));
|
2017-12-16 21:19:51 -05:00
|
|
|
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_intr_type(TEST_GPIO_EXT_IN_IO, GPIO_INTR_LOW_LEVEL);
|
2017-12-16 21:19:51 -05:00
|
|
|
gpio_install_isr_service(0);
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_isr_handler_add(TEST_GPIO_EXT_IN_IO, gpio_isr_level_handler, (void*) TEST_GPIO_EXT_IN_IO);
|
|
|
|
gpio_set_level(TEST_GPIO_EXT_OUT_IO, 0);
|
|
|
|
printf("get level:%d\n",gpio_get_level(TEST_GPIO_EXT_IN_IO));
|
2017-12-16 21:19:51 -05:00
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(disable_intr_times, 1, "go into low-level interrupt more than once with disable way");
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_isr_handler_remove(TEST_GPIO_EXT_IN_IO);
|
2017-12-16 21:19:51 -05:00
|
|
|
gpio_uninstall_isr_service();
|
|
|
|
}
|
|
|
|
|
2018-09-05 23:47:17 -04:00
|
|
|
TEST_CASE("GPIO multi-level interrupt test, to cut the interrupt source exit interrupt ", "[gpio][test_env=UT_T1_GPIO]")
|
|
|
|
{
|
|
|
|
level_intr_times=0;
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_config_t output_io = init_io(TEST_GPIO_EXT_OUT_IO);
|
|
|
|
gpio_config_t input_io = init_io(TEST_GPIO_EXT_IN_IO);
|
2018-09-05 23:47:17 -04:00
|
|
|
input_io.intr_type = GPIO_INTR_POSEDGE;
|
|
|
|
input_io.mode = GPIO_MODE_INPUT;
|
|
|
|
input_io.pull_up_en = 1;
|
|
|
|
TEST_ESP_OK(gpio_config(&output_io));
|
|
|
|
TEST_ESP_OK(gpio_config(&input_io));
|
2020-02-25 04:41:50 -05:00
|
|
|
TEST_ESP_OK(gpio_set_level(TEST_GPIO_EXT_OUT_IO, 0));
|
2018-09-05 23:47:17 -04:00
|
|
|
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_intr_type(TEST_GPIO_EXT_IN_IO, GPIO_INTR_HIGH_LEVEL);
|
2018-09-05 23:47:17 -04:00
|
|
|
gpio_install_isr_service(0);
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_isr_handler_add(TEST_GPIO_EXT_IN_IO, gpio_isr_level_handler2, (void*) TEST_GPIO_EXT_IN_IO);
|
|
|
|
gpio_set_level(TEST_GPIO_EXT_OUT_IO, 1);
|
2018-09-05 23:47:17 -04:00
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(level_intr_times, 1, "go into high-level interrupt more than once with cur interrupt source way");
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_level(TEST_GPIO_EXT_OUT_IO, 1);
|
2018-09-05 23:47:17 -04:00
|
|
|
vTaskDelay(200 / portTICK_RATE_MS);
|
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(level_intr_times, 2, "go into high-level interrupt more than once with cur interrupt source way");
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_isr_handler_remove(TEST_GPIO_EXT_IN_IO);
|
2018-09-05 23:47:17 -04:00
|
|
|
gpio_uninstall_isr_service();
|
|
|
|
}
|
|
|
|
|
2017-12-16 21:19:51 -05:00
|
|
|
TEST_CASE("GPIO enable and disable interrupt test", "[gpio][test_env=UT_T1_GPIO]")
|
|
|
|
{
|
2019-11-26 07:00:24 -05:00
|
|
|
disable_intr_times = 0;
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_config_t output_io = init_io(TEST_GPIO_EXT_OUT_IO);
|
|
|
|
gpio_config_t input_io = init_io(TEST_GPIO_EXT_IN_IO);
|
2017-12-16 21:19:51 -05:00
|
|
|
input_io.intr_type = GPIO_INTR_POSEDGE;
|
|
|
|
input_io.mode = GPIO_MODE_INPUT;
|
|
|
|
input_io.pull_up_en = 1;
|
|
|
|
TEST_ESP_OK(gpio_config(&output_io));
|
|
|
|
TEST_ESP_OK(gpio_config(&input_io));
|
|
|
|
|
2020-02-25 04:41:50 -05:00
|
|
|
TEST_ESP_OK(gpio_set_level(TEST_GPIO_EXT_OUT_IO, 0)); // Because of GPIO_INTR_HIGH_LEVEL interrupt, 0 must be set first
|
|
|
|
TEST_ESP_OK(gpio_set_intr_type(TEST_GPIO_EXT_IN_IO, GPIO_INTR_HIGH_LEVEL));
|
2017-12-16 21:19:51 -05:00
|
|
|
TEST_ESP_OK(gpio_install_isr_service(0));
|
2020-02-25 04:41:50 -05:00
|
|
|
TEST_ESP_OK(gpio_isr_handler_add(TEST_GPIO_EXT_IN_IO, gpio_isr_level_handler, (void*) TEST_GPIO_EXT_IN_IO));
|
|
|
|
TEST_ESP_OK(gpio_set_level(TEST_GPIO_EXT_OUT_IO, 1));
|
|
|
|
TEST_ESP_OK(gpio_isr_handler_remove(TEST_GPIO_EXT_IN_IO));
|
|
|
|
TEST_ESP_OK(gpio_set_level(TEST_GPIO_EXT_OUT_IO, 0));
|
2017-12-16 21:19:51 -05:00
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(disable_intr_times, 1, "go into high-level interrupt more than once with disable way");
|
|
|
|
|
|
|
|
// not install service now
|
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
2020-02-25 04:41:50 -05:00
|
|
|
TEST_ESP_OK(gpio_intr_disable(TEST_GPIO_EXT_IN_IO));
|
|
|
|
TEST_ESP_OK(gpio_set_level(TEST_GPIO_EXT_OUT_IO, 1));
|
2017-12-16 21:19:51 -05:00
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(disable_intr_times, 1, "disable interrupt does not work, still go into interrupt!");
|
|
|
|
|
|
|
|
gpio_uninstall_isr_service(); //uninstall the service
|
2020-02-25 04:41:50 -05:00
|
|
|
TEST_ASSERT(gpio_isr_handler_add(TEST_GPIO_EXT_IN_IO, gpio_isr_level_handler, (void*) TEST_GPIO_EXT_IN_IO) == ESP_ERR_INVALID_STATE);
|
|
|
|
TEST_ASSERT(gpio_isr_handler_remove(TEST_GPIO_EXT_IN_IO) == ESP_ERR_INVALID_STATE);
|
2017-12-16 21:19:51 -05:00
|
|
|
}
|
2020-12-16 04:03:48 -05:00
|
|
|
#endif //DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
|
2017-12-16 21:19:51 -05:00
|
|
|
|
2020-12-16 04:03:48 -05:00
|
|
|
// ESP32 Connect GPIO18 with GPIO19, ESP32-S2 Connect GPIO17 with GPIO21,
|
|
|
|
// ESP32-S3 Connect GPIO19 with GPIO20, ESP32C3 Connect GPIO2 with GPIO3
|
2017-12-16 21:19:51 -05:00
|
|
|
// use multimeter to test the voltage, so it is ignored in CI
|
|
|
|
TEST_CASE("GPIO set gpio output level test", "[gpio][ignore]")
|
|
|
|
{
|
|
|
|
gpio_config_t io_conf;
|
2020-06-19 00:00:58 -04:00
|
|
|
io_conf.intr_type = GPIO_INTR_DISABLE;
|
2017-12-16 21:19:51 -05:00
|
|
|
io_conf.mode = GPIO_MODE_OUTPUT;
|
2021-05-06 04:20:54 -04:00
|
|
|
io_conf.pin_bit_mask = ((uint64_t)1<<TEST_GPIO_EXT_OUT_IO);
|
2017-12-16 21:19:51 -05:00
|
|
|
io_conf.pull_down_en = 0;
|
|
|
|
io_conf.pull_up_en = 0;
|
|
|
|
gpio_config(&io_conf);
|
|
|
|
|
2021-05-06 04:20:54 -04:00
|
|
|
io_conf.pin_bit_mask = ((uint64_t)1<<TEST_GPIO_EXT_IN_IO);
|
2017-12-16 21:19:51 -05:00
|
|
|
io_conf.mode = GPIO_MODE_INPUT;
|
|
|
|
gpio_config(&io_conf);
|
|
|
|
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_level(TEST_GPIO_EXT_OUT_IO, 0);
|
2017-12-16 21:19:51 -05:00
|
|
|
// tested voltage is around 0v
|
2020-02-25 04:41:50 -05:00
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(gpio_get_level(TEST_GPIO_EXT_IN_IO), 0, "get level error! the level should be low!");
|
2017-12-16 21:19:51 -05:00
|
|
|
vTaskDelay(1000 / portTICK_RATE_MS);
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_level(TEST_GPIO_EXT_OUT_IO, 1);
|
2017-12-16 21:19:51 -05:00
|
|
|
// tested voltage is around 3.3v
|
2020-02-25 04:41:50 -05:00
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(gpio_get_level(TEST_GPIO_EXT_IN_IO), 1, "get level error! the level should be high!");
|
2019-11-26 07:00:24 -05:00
|
|
|
|
2020-12-16 04:03:48 -05:00
|
|
|
//This IO is just used for input, C3 doesn't have input only pin.
|
|
|
|
#if !CONFIG_IDF_TARGET_ESP32C3
|
2020-02-25 04:41:50 -05:00
|
|
|
io_conf.pin_bit_mask = ((uint64_t)1<<TEST_GPIO_INPUT_ONLY_PIN);
|
2017-12-16 21:19:51 -05:00
|
|
|
io_conf.mode = GPIO_MODE_OUTPUT;
|
|
|
|
gpio_config(&io_conf);
|
|
|
|
TEST_ASSERT(gpio_config(&io_conf) == ESP_ERR_INVALID_ARG);
|
2020-12-16 04:03:48 -05:00
|
|
|
#endif //!CONFIG_IDF_TARGET_ESP32C3
|
2017-12-16 21:19:51 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
// gpio17 connects to 3.3v pin, gpio19 connects to the GND pin
|
|
|
|
// use multimeter to test the voltage, so it is ignored in CI
|
|
|
|
TEST_CASE("GPIO get input level test", "[gpio][ignore]")
|
|
|
|
{
|
|
|
|
gpio_num_t num = 17;
|
|
|
|
int level = gpio_get_level(num);
|
|
|
|
printf("gpio17's level is: %d\n", level);
|
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(level, 1, "get level error! the level should be high!");
|
|
|
|
|
|
|
|
gpio_num_t num2 = 19;
|
|
|
|
int level2 = gpio_get_level(num2);
|
|
|
|
printf("gpio19's level is: %d\n", level2);
|
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(level2, 0, "get level error! the level should be low!");
|
|
|
|
printf("the memory get: %d\n", esp_get_free_heap_size());
|
|
|
|
//when case finish, get the result from multimeter, the pin17 is 3.3v, the pin19 is 0.00v
|
|
|
|
}
|
|
|
|
|
|
|
|
TEST_CASE("GPIO io pull up/down function", "[gpio]")
|
|
|
|
{
|
2019-11-26 07:00:24 -05:00
|
|
|
// First, ensure that the output IO will not affect the level
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_config_t io_conf = init_io(TEST_GPIO_EXT_OUT_IO);
|
2019-11-26 07:00:24 -05:00
|
|
|
gpio_config(&io_conf);
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_direction(TEST_GPIO_EXT_OUT_IO, GPIO_MODE_INPUT);
|
|
|
|
io_conf = init_io(TEST_GPIO_EXT_IN_IO);
|
2017-12-16 21:19:51 -05:00
|
|
|
gpio_config(&io_conf);
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_direction(TEST_GPIO_EXT_IN_IO, GPIO_MODE_INPUT);
|
|
|
|
TEST_ESP_OK(gpio_pullup_en(TEST_GPIO_EXT_IN_IO)); // pull up first
|
2017-12-16 21:19:51 -05:00
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
2020-02-25 04:41:50 -05:00
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(gpio_get_level(TEST_GPIO_EXT_IN_IO), 1, "gpio_pullup_en error, it can't pull up");
|
|
|
|
TEST_ESP_OK(gpio_pulldown_dis(TEST_GPIO_EXT_IN_IO)); //can't be pull down
|
2017-12-16 21:19:51 -05:00
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
2020-02-25 04:41:50 -05:00
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(gpio_get_level(TEST_GPIO_EXT_IN_IO), 1, "gpio_pulldown_dis error, it can pull down");
|
|
|
|
TEST_ESP_OK(gpio_pulldown_en(TEST_GPIO_EXT_IN_IO)); // can be pull down now
|
2017-12-16 21:19:51 -05:00
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
2020-02-25 04:41:50 -05:00
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(gpio_get_level(TEST_GPIO_EXT_IN_IO), 0, "gpio_pulldown_en error, it can't pull down");
|
|
|
|
TEST_ESP_OK(gpio_pullup_dis(TEST_GPIO_EXT_IN_IO)); // can't be pull up
|
2017-12-16 21:19:51 -05:00
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
2020-02-25 04:41:50 -05:00
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(gpio_get_level(TEST_GPIO_EXT_IN_IO), 0, "gpio_pullup_dis error, it can pull up");
|
2017-12-16 21:19:51 -05:00
|
|
|
}
|
|
|
|
|
2020-12-16 04:03:48 -05:00
|
|
|
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
|
2020-01-02 01:25:33 -05:00
|
|
|
//No runners
|
2017-12-16 21:19:51 -05:00
|
|
|
TEST_CASE("GPIO output and input mode test", "[gpio][test_env=UT_T1_GPIO]")
|
|
|
|
{
|
2020-12-16 04:03:48 -05:00
|
|
|
//ESP32 connect io18 and io19, ESP32-S2 connect io17 and io21, ESP32-S3 connect io19 and io20, ESP32C3 Connect GPIO2 with GPIO3
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_config_t output_io = init_io(TEST_GPIO_EXT_OUT_IO);
|
|
|
|
gpio_config_t input_io = init_io(TEST_GPIO_EXT_IN_IO);
|
2017-12-16 21:19:51 -05:00
|
|
|
gpio_config(&output_io);
|
|
|
|
gpio_config(&input_io);
|
2020-02-25 04:41:50 -05:00
|
|
|
int level = gpio_get_level(TEST_GPIO_EXT_IN_IO);
|
2017-12-16 21:19:51 -05:00
|
|
|
|
|
|
|
//disable mode
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_direction(TEST_GPIO_EXT_OUT_IO, GPIO_MODE_DISABLE);
|
|
|
|
gpio_set_direction(TEST_GPIO_EXT_IN_IO, GPIO_MODE_OUTPUT);
|
|
|
|
gpio_set_level(TEST_GPIO_EXT_OUT_IO, !level);
|
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(gpio_get_level(TEST_GPIO_EXT_IN_IO), level, "direction GPIO_MODE_DISABLE set error, it can output");
|
2017-12-16 21:19:51 -05:00
|
|
|
|
|
|
|
//input mode and output mode
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_direction(TEST_GPIO_EXT_OUT_IO, GPIO_MODE_OUTPUT);
|
|
|
|
gpio_set_direction(TEST_GPIO_EXT_IN_IO, GPIO_MODE_INPUT);
|
|
|
|
gpio_set_level(TEST_GPIO_EXT_OUT_IO, 1);
|
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(gpio_get_level(TEST_GPIO_EXT_IN_IO), 1, "direction GPIO_MODE_OUTPUT set error, it can't output");
|
|
|
|
gpio_set_level(TEST_GPIO_EXT_OUT_IO, 0);
|
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(gpio_get_level(TEST_GPIO_EXT_IN_IO), 0, "direction GPIO_MODE_OUTPUT set error, it can't output");
|
2017-12-16 21:19:51 -05:00
|
|
|
|
|
|
|
// open drain mode(output), can just output low level
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_direction(TEST_GPIO_EXT_OUT_IO, GPIO_MODE_OUTPUT_OD);
|
|
|
|
gpio_set_direction(TEST_GPIO_EXT_IN_IO, GPIO_MODE_INPUT);
|
|
|
|
gpio_set_level(TEST_GPIO_EXT_OUT_IO, 1);
|
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(gpio_get_level(TEST_GPIO_EXT_IN_IO), 0, "direction GPIO_MODE_OUTPUT set error, it can't output");
|
|
|
|
gpio_set_level(TEST_GPIO_EXT_OUT_IO, 0);
|
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(gpio_get_level(TEST_GPIO_EXT_IN_IO), 0, "direction GPIO_MODE_OUTPUT set error, it can't output");
|
2017-12-16 21:19:51 -05:00
|
|
|
|
|
|
|
// open drain mode(output and input), can just output low level
|
|
|
|
// output test
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_direction(TEST_GPIO_EXT_OUT_IO, GPIO_MODE_INPUT_OUTPUT_OD);
|
|
|
|
gpio_set_direction(TEST_GPIO_EXT_IN_IO, GPIO_MODE_INPUT);
|
|
|
|
gpio_set_level(TEST_GPIO_EXT_OUT_IO, 1);
|
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(gpio_get_level(TEST_GPIO_EXT_IN_IO), 0, "direction GPIO_MODE_OUTPUT set error, it can't output");
|
|
|
|
gpio_set_level(TEST_GPIO_EXT_OUT_IO, 0);
|
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(gpio_get_level(TEST_GPIO_EXT_IN_IO), 0, "direction GPIO_MODE_OUTPUT set error, it can't output");
|
2017-12-16 21:19:51 -05:00
|
|
|
|
|
|
|
// GPIO_MODE_INPUT_OUTPUT mode
|
|
|
|
// output test
|
2020-02-25 04:41:50 -05:00
|
|
|
level = gpio_get_level(TEST_GPIO_EXT_IN_IO);
|
|
|
|
gpio_set_direction(TEST_GPIO_EXT_OUT_IO, GPIO_MODE_INPUT_OUTPUT);
|
|
|
|
gpio_set_direction(TEST_GPIO_EXT_IN_IO, GPIO_MODE_INPUT);
|
|
|
|
gpio_set_level(TEST_GPIO_EXT_OUT_IO, !level);
|
|
|
|
TEST_ASSERT_EQUAL_INT_MESSAGE(gpio_get_level(TEST_GPIO_EXT_IN_IO), !level, "direction set error, it can't output");
|
2017-12-16 21:19:51 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
TEST_CASE("GPIO repeate call service and isr has no memory leak test","[gpio][test_env=UT_T1_GPIO][timeout=90]")
|
|
|
|
{
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_config_t output_io = init_io(TEST_GPIO_EXT_OUT_IO);
|
|
|
|
gpio_config_t input_io = init_io(TEST_GPIO_EXT_IN_IO);
|
2017-12-16 21:19:51 -05:00
|
|
|
input_io.intr_type = GPIO_INTR_POSEDGE;
|
|
|
|
input_io.mode = GPIO_MODE_INPUT;
|
|
|
|
input_io.pull_up_en = 1;
|
|
|
|
TEST_ESP_OK(gpio_config(&output_io));
|
|
|
|
TEST_ESP_OK(gpio_config(&input_io));
|
2020-02-25 04:41:50 -05:00
|
|
|
TEST_ESP_OK(gpio_set_level(TEST_GPIO_EXT_OUT_IO, 0));
|
2017-12-16 21:19:51 -05:00
|
|
|
//rising edge
|
|
|
|
uint32_t size = esp_get_free_heap_size();
|
|
|
|
for(int i=0;i<1000;i++) {
|
2020-02-25 04:41:50 -05:00
|
|
|
TEST_ESP_OK(gpio_set_intr_type(TEST_GPIO_EXT_IN_IO, GPIO_INTR_POSEDGE));
|
2017-12-16 21:19:51 -05:00
|
|
|
TEST_ESP_OK(gpio_install_isr_service(0));
|
2020-02-25 04:41:50 -05:00
|
|
|
TEST_ESP_OK(gpio_isr_handler_add(TEST_GPIO_EXT_IN_IO, gpio_isr_edge_handler, (void*)TEST_GPIO_EXT_IN_IO));
|
|
|
|
gpio_set_level(TEST_GPIO_EXT_OUT_IO, 1);
|
|
|
|
TEST_ESP_OK(gpio_isr_handler_remove(TEST_GPIO_EXT_IN_IO));
|
|
|
|
gpio_set_level(TEST_GPIO_EXT_OUT_IO, 0);
|
2017-12-16 21:19:51 -05:00
|
|
|
gpio_uninstall_isr_service();
|
|
|
|
}
|
|
|
|
TEST_ASSERT_INT32_WITHIN(size, esp_get_free_heap_size(), 100);
|
|
|
|
}
|
2020-12-16 04:03:48 -05:00
|
|
|
#endif //DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
|
2017-12-16 21:19:51 -05:00
|
|
|
|
2018-06-03 22:34:23 -04:00
|
|
|
#if !WAKE_UP_IGNORE
|
2017-12-16 21:19:51 -05:00
|
|
|
//this function development is not completed yet, set it ignored
|
|
|
|
TEST_CASE("GPIO wake up enable and disenable test", "[gpio][ignore]")
|
|
|
|
{
|
|
|
|
xTaskCreate(sleep_wake_up, "sleep_wake_up", 4096, NULL, 5, NULL);
|
|
|
|
xTaskCreate(trigger_wake_up, "trigger_wake_up", 4096, NULL, 5, NULL);
|
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
|
|
|
TEST_ASSERT_TRUE(wake_up_result);
|
|
|
|
|
|
|
|
wake_up_result = false;
|
2020-02-25 04:41:50 -05:00
|
|
|
TEST_ESP_OK(gpio_wakeup_disable(TEST_GPIO_EXT_IN_IO));
|
|
|
|
gpio_set_level(TEST_GPIO_EXT_OUT_IO, 1);
|
2017-12-16 21:19:51 -05:00
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
|
|
|
TEST_ASSERT_FALSE(wake_up_result);
|
|
|
|
}
|
2020-12-16 04:03:48 -05:00
|
|
|
#endif // !WAKE_UP_IGNORE
|
2017-12-16 21:19:51 -05:00
|
|
|
|
|
|
|
// this case need the resistance to pull up the voltage or pull down the voltage
|
|
|
|
// ignored because the voltage needs to be tested with multimeter
|
|
|
|
TEST_CASE("GPIO verify only the gpio with input ability can be set pull/down", "[gpio][ignore]")
|
|
|
|
{
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_config_t output_io = init_io(TEST_GPIO_EXT_OUT_IO);
|
|
|
|
gpio_config_t input_io = init_io(TEST_GPIO_EXT_IN_IO);
|
2017-12-16 21:19:51 -05:00
|
|
|
gpio_config(&output_io);
|
|
|
|
input_io.mode = GPIO_MODE_INPUT;
|
|
|
|
gpio_config(&input_io);
|
|
|
|
|
|
|
|
printf("pull up test!\n");
|
|
|
|
// pull up test
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_direction(TEST_GPIO_EXT_OUT_IO, GPIO_MODE_OUTPUT);
|
|
|
|
TEST_ESP_OK(gpio_set_pull_mode(TEST_GPIO_EXT_OUT_IO, GPIO_PULLUP_ONLY));
|
2017-12-16 21:19:51 -05:00
|
|
|
prompt_to_continue("mode: GPIO_MODE_OUTPUT");
|
|
|
|
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_direction(TEST_GPIO_EXT_OUT_IO, GPIO_MODE_OUTPUT_OD);
|
|
|
|
TEST_ESP_OK(gpio_set_pull_mode(TEST_GPIO_EXT_OUT_IO, GPIO_PULLUP_ONLY));
|
2017-12-16 21:19:51 -05:00
|
|
|
|
|
|
|
// open drain just can output low level
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_direction(TEST_GPIO_EXT_OUT_IO, GPIO_MODE_INPUT_OUTPUT_OD);
|
|
|
|
TEST_ESP_OK(gpio_set_pull_mode(TEST_GPIO_EXT_OUT_IO, GPIO_PULLUP_ONLY));
|
2017-12-16 21:19:51 -05:00
|
|
|
prompt_to_continue("mode: GPIO_MODE_OUTPUT_OD");
|
|
|
|
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_direction(TEST_GPIO_EXT_OUT_IO, GPIO_MODE_INPUT_OUTPUT);
|
|
|
|
TEST_ESP_OK(gpio_set_pull_mode(TEST_GPIO_EXT_OUT_IO, GPIO_PULLUP_ONLY));
|
2017-12-16 21:19:51 -05:00
|
|
|
prompt_to_continue("mode: GPIO_MODE_INPUT_OUTPUT");
|
|
|
|
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_direction(TEST_GPIO_EXT_OUT_IO, GPIO_MODE_INPUT);
|
|
|
|
TEST_ESP_OK(gpio_set_pull_mode(TEST_GPIO_EXT_OUT_IO, GPIO_PULLUP_ONLY));
|
2017-12-16 21:19:51 -05:00
|
|
|
prompt_to_continue("mode: GPIO_MODE_INPUT");
|
|
|
|
|
|
|
|
// after pull up the level is high now
|
|
|
|
// pull down test
|
|
|
|
printf("pull down test!\n");
|
|
|
|
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_direction(TEST_GPIO_EXT_OUT_IO, GPIO_MODE_OUTPUT);
|
|
|
|
TEST_ESP_OK(gpio_set_pull_mode(TEST_GPIO_EXT_OUT_IO, GPIO_PULLDOWN_ONLY));
|
2017-12-16 21:19:51 -05:00
|
|
|
prompt_to_continue("mode: GPIO_MODE_OUTPUT");
|
|
|
|
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_direction(TEST_GPIO_EXT_OUT_IO, GPIO_MODE_OUTPUT_OD);
|
|
|
|
TEST_ESP_OK(gpio_set_pull_mode(TEST_GPIO_EXT_OUT_IO, GPIO_PULLDOWN_ONLY));
|
2017-12-16 21:19:51 -05:00
|
|
|
prompt_to_continue("mode: GPIO_MODE_OUTPUT_OD");
|
|
|
|
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_direction(TEST_GPIO_EXT_OUT_IO, GPIO_MODE_INPUT_OUTPUT_OD);
|
|
|
|
TEST_ESP_OK(gpio_set_pull_mode(TEST_GPIO_EXT_OUT_IO, GPIO_PULLDOWN_ONLY));
|
2017-12-16 21:19:51 -05:00
|
|
|
prompt_to_continue("mode: GPIO_MODE_INPUT_OUTPUT_OD");
|
|
|
|
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_direction(TEST_GPIO_EXT_OUT_IO, GPIO_MODE_INPUT_OUTPUT);
|
|
|
|
TEST_ESP_OK(gpio_set_pull_mode(TEST_GPIO_EXT_OUT_IO, GPIO_PULLDOWN_ONLY));
|
2017-12-16 21:19:51 -05:00
|
|
|
prompt_to_continue("mode: GPIO_MODE_INPUT_OUTPUT");
|
|
|
|
|
2020-02-25 04:41:50 -05:00
|
|
|
gpio_set_direction(TEST_GPIO_EXT_OUT_IO, GPIO_MODE_INPUT);
|
|
|
|
TEST_ESP_OK(gpio_set_pull_mode(TEST_GPIO_EXT_OUT_IO, GPIO_PULLDOWN_ONLY));
|
2017-12-16 21:19:51 -05:00
|
|
|
prompt_to_continue("mode: GPIO_MODE_INPUT");
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* There are 5 situation for the GPIO drive capability:
|
|
|
|
* 1. GPIO drive weak capability test
|
|
|
|
* 2. GPIO drive stronger capability test
|
|
|
|
* 3. GPIO drive default capability test
|
|
|
|
* 4. GPIO drive default capability test2
|
|
|
|
* 5. GPIO drive strongest capability test
|
|
|
|
*
|
|
|
|
* How to test:
|
|
|
|
* when testing, use the sliding resistor and a multimeter
|
|
|
|
* adjust the resistor from low to high, 0-10k
|
|
|
|
* watch the current change
|
|
|
|
* the current test result:
|
|
|
|
* weak capability: (0.32-10.1)mA
|
|
|
|
* stronger capability: (0.32-20.0)mA
|
|
|
|
* default capability: (0.33-39.8)mA
|
|
|
|
* default capability2: (0.33-39.9)mA
|
|
|
|
* strongest capability: (0.33-64.2)mA
|
|
|
|
*
|
|
|
|
* the data shows:
|
|
|
|
* weak capability<stronger capability<default capability=default capability2<strongest capability
|
|
|
|
*
|
|
|
|
* all of these cases should be ignored that it will not run in CI
|
|
|
|
*/
|
|
|
|
|
|
|
|
// drive capability test
|
|
|
|
TEST_CASE("GPIO drive capability test", "[gpio][ignore]")
|
|
|
|
{
|
|
|
|
printf("weak capability test! please view the current change!\n");
|
2020-02-25 04:41:50 -05:00
|
|
|
drive_capability_set_get(TEST_GPIO_EXT_OUT_IO, GPIO_DRIVE_CAP_0);
|
2017-12-16 21:19:51 -05:00
|
|
|
prompt_to_continue("If this test finishes");
|
|
|
|
|
|
|
|
printf("stronger capability test! please view the current change!\n");
|
2020-02-25 04:41:50 -05:00
|
|
|
drive_capability_set_get(TEST_GPIO_EXT_OUT_IO, GPIO_DRIVE_CAP_1);
|
2017-12-16 21:19:51 -05:00
|
|
|
prompt_to_continue("If this test finishes");
|
|
|
|
|
|
|
|
printf("default capability test! please view the current change!\n");
|
2020-02-25 04:41:50 -05:00
|
|
|
drive_capability_set_get(TEST_GPIO_EXT_OUT_IO, GPIO_DRIVE_CAP_2);
|
2017-12-16 21:19:51 -05:00
|
|
|
prompt_to_continue("If this test finishes");
|
|
|
|
|
|
|
|
printf("default capability2 test! please view the current change!\n");
|
2020-02-25 04:41:50 -05:00
|
|
|
drive_capability_set_get(TEST_GPIO_EXT_OUT_IO, GPIO_DRIVE_CAP_DEFAULT);
|
2017-12-16 21:19:51 -05:00
|
|
|
prompt_to_continue("If this test finishes");
|
|
|
|
|
|
|
|
printf("strongest capability test! please view the current change!\n");
|
2020-02-25 04:41:50 -05:00
|
|
|
drive_capability_set_get(TEST_GPIO_EXT_OUT_IO, GPIO_DRIVE_CAP_3);
|
2017-12-16 21:19:51 -05:00
|
|
|
prompt_to_continue("If this test finishes");
|
|
|
|
}
|
2019-07-17 23:34:49 -04:00
|
|
|
|
|
|
|
#if !CONFIG_FREERTOS_UNICORE
|
2020-12-16 04:03:48 -05:00
|
|
|
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
|
2019-07-17 23:34:49 -04:00
|
|
|
void gpio_enable_task(void *param)
|
|
|
|
{
|
|
|
|
int gpio_num = (int)param;
|
|
|
|
TEST_ESP_OK(gpio_intr_enable(gpio_num));
|
|
|
|
vTaskDelete(NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
/** Test the GPIO Interrupt Enable API with dual core enabled. The GPIO ISR service routine is registered on one core.
|
|
|
|
* When the GPIO interrupt on another core is enabled, the GPIO interrupt will be lost.
|
|
|
|
* First on the core 0, Do the following steps:
|
2020-12-16 04:03:48 -05:00
|
|
|
* 1. Configure the GPIO9 input_output mode, and enable the rising edge interrupt mode.
|
|
|
|
* 2. Trigger the GPIO9 interrupt and check if the interrupt responds correctly.
|
|
|
|
* 3. Disable the GPIO9 interrupt
|
2019-07-17 23:34:49 -04:00
|
|
|
* Then on the core 1, Do the following steps:
|
2020-12-16 04:03:48 -05:00
|
|
|
* 1. Enable the GPIO9 interrupt again.
|
|
|
|
* 2. Trigger the GPIO9 interrupt and check if the interrupt responds correctly.
|
2019-07-17 23:34:49 -04:00
|
|
|
*
|
|
|
|
*/
|
|
|
|
TEST_CASE("GPIO Enable/Disable interrupt on multiple cores", "[gpio][ignore]")
|
|
|
|
{
|
|
|
|
gpio_config_t io_conf;
|
|
|
|
io_conf.intr_type = GPIO_INTR_NEGEDGE;
|
|
|
|
io_conf.mode = GPIO_MODE_INPUT_OUTPUT;
|
2020-12-16 04:03:48 -05:00
|
|
|
io_conf.pin_bit_mask = (1ULL << TEST_IO_9);
|
2019-07-17 23:34:49 -04:00
|
|
|
io_conf.pull_down_en = 0;
|
|
|
|
io_conf.pull_up_en = 1;
|
|
|
|
TEST_ESP_OK(gpio_config(&io_conf));
|
2020-12-16 04:03:48 -05:00
|
|
|
TEST_ESP_OK(gpio_set_level(TEST_IO_9, 0));
|
2019-07-17 23:34:49 -04:00
|
|
|
TEST_ESP_OK(gpio_install_isr_service(0));
|
2020-12-16 04:03:48 -05:00
|
|
|
TEST_ESP_OK(gpio_isr_handler_add(TEST_IO_9, gpio_isr_edge_handler, (void*) TEST_IO_9));
|
2019-07-17 23:34:49 -04:00
|
|
|
vTaskDelay(1000 / portTICK_RATE_MS);
|
2020-12-16 04:03:48 -05:00
|
|
|
TEST_ESP_OK(gpio_set_level(TEST_IO_9, 1));
|
2019-07-17 23:34:49 -04:00
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
2020-12-16 04:03:48 -05:00
|
|
|
TEST_ESP_OK(gpio_set_level(TEST_IO_9, 0));
|
2019-07-17 23:34:49 -04:00
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
2020-12-16 04:03:48 -05:00
|
|
|
TEST_ESP_OK(gpio_intr_disable(TEST_IO_9));
|
2019-07-17 23:34:49 -04:00
|
|
|
TEST_ASSERT(edge_intr_times == 1);
|
2020-12-16 04:03:48 -05:00
|
|
|
xTaskCreatePinnedToCore(gpio_enable_task, "gpio_enable_task", 1024*4, (void*)TEST_IO_9, 8, NULL, (xPortGetCoreID() == 0));
|
2019-07-17 23:34:49 -04:00
|
|
|
vTaskDelay(1000 / portTICK_RATE_MS);
|
2020-12-16 04:03:48 -05:00
|
|
|
TEST_ESP_OK(gpio_set_level(TEST_IO_9, 1));
|
2019-07-17 23:34:49 -04:00
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
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2020-12-16 04:03:48 -05:00
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TEST_ESP_OK(gpio_set_level(TEST_IO_9, 0));
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2019-07-17 23:34:49 -04:00
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vTaskDelay(100 / portTICK_RATE_MS);
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2020-12-16 04:03:48 -05:00
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TEST_ESP_OK(gpio_intr_disable(TEST_IO_9));
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TEST_ESP_OK(gpio_isr_handler_remove(TEST_IO_9));
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2019-07-17 23:34:49 -04:00
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|
gpio_uninstall_isr_service();
|
|
|
|
TEST_ASSERT(edge_intr_times == 2);
|
|
|
|
}
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2020-12-16 04:03:48 -05:00
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#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
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#endif //!CONFIG_FREERTOS_UNICORE
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2019-07-17 23:34:49 -04:00
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|
|
|
typedef struct {
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|
|
|
int gpio_num;
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|
|
|
int isr_cnt;
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|
|
} gpio_isr_param_t;
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|
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|
|
|
|
static void gpio_isr_handler(void* arg)
|
|
|
|
{
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|
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gpio_isr_param_t *param = (gpio_isr_param_t *)arg;
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2020-07-21 01:07:34 -04:00
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esp_rom_printf("GPIO[%d] intr, val: %d\n", param->gpio_num, gpio_get_level(param->gpio_num));
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2019-07-17 23:34:49 -04:00
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|
param->isr_cnt++;
|
|
|
|
}
|
|
|
|
|
2020-01-02 01:25:33 -05:00
|
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|
/** The previous GPIO interrupt service routine polls the interrupt raw status register to find the GPIO that triggered the interrupt.
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2019-07-17 23:34:49 -04:00
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* But this will incorrectly handle the interrupt disabled GPIOs, because the raw interrupt status register can still be set when
|
|
|
|
* the trigger signal arrives, even if the interrupt is disabled.
|
|
|
|
* First on the core 0:
|
2020-12-16 04:03:48 -05:00
|
|
|
* 1. Configure the GPIO9 and GPIO10(ESP32, ESP32C3)/GPIO21(ESP32-S2) input_output mode.
|
|
|
|
* 2. Enable GPIO9 dual edge triggered interrupt, enable GPIO10(ESP32, ESP32C3)/GPIO21(ESP32-S2) falling edge triggered interrupt.
|
|
|
|
* 3. Trigger GPIO9 interrupt, than disable the GPIO18 interrupt, and than trigger GPIO18 again(This time will not respond to the interrupt).
|
|
|
|
* 4. Trigger GPIO10(ESP32, ESP32C3)/GPIO21(ESP32-S2) interrupt.
|
|
|
|
* If the bug is not fixed, you will see, in the step 4, the interrupt of GPIO9 will also respond.
|
2019-07-17 23:34:49 -04:00
|
|
|
*/
|
|
|
|
TEST_CASE("GPIO ISR service test", "[gpio][ignore]")
|
|
|
|
{
|
2020-12-16 04:03:48 -05:00
|
|
|
static gpio_isr_param_t io9_param = {
|
|
|
|
.gpio_num = TEST_IO_9,
|
2019-07-17 23:34:49 -04:00
|
|
|
.isr_cnt = 0,
|
|
|
|
};
|
2020-12-16 04:03:48 -05:00
|
|
|
static gpio_isr_param_t io10_param = {
|
|
|
|
.gpio_num = TEST_IO_10,
|
2019-07-17 23:34:49 -04:00
|
|
|
.isr_cnt = 0,
|
|
|
|
};
|
|
|
|
gpio_config_t io_conf;
|
|
|
|
io_conf.intr_type = GPIO_INTR_DISABLE;
|
|
|
|
io_conf.mode = GPIO_MODE_INPUT_OUTPUT;
|
2020-12-16 04:03:48 -05:00
|
|
|
io_conf.pin_bit_mask = (1ULL << TEST_IO_9) | (1ULL << TEST_IO_10);
|
2019-07-17 23:34:49 -04:00
|
|
|
io_conf.pull_down_en = 0;
|
|
|
|
io_conf.pull_up_en = 1;
|
|
|
|
TEST_ESP_OK(gpio_config(&io_conf));
|
2020-12-16 04:03:48 -05:00
|
|
|
TEST_ESP_OK(gpio_set_level(TEST_IO_9, 0));
|
|
|
|
TEST_ESP_OK(gpio_set_level(TEST_IO_10, 0));
|
2019-07-17 23:34:49 -04:00
|
|
|
TEST_ESP_OK(gpio_install_isr_service(0));
|
2020-12-16 04:03:48 -05:00
|
|
|
TEST_ESP_OK(gpio_set_intr_type(TEST_IO_9, GPIO_INTR_ANYEDGE));
|
|
|
|
TEST_ESP_OK(gpio_set_intr_type(TEST_IO_10, GPIO_INTR_NEGEDGE));
|
|
|
|
TEST_ESP_OK(gpio_isr_handler_add(TEST_IO_9, gpio_isr_handler, (void*)&io9_param));
|
|
|
|
TEST_ESP_OK(gpio_isr_handler_add(TEST_IO_10, gpio_isr_handler, (void*)&io10_param));
|
|
|
|
printf("Triggering the interrupt of GPIO9\n");
|
2019-07-17 23:34:49 -04:00
|
|
|
vTaskDelay(1000 / portTICK_RATE_MS);
|
|
|
|
//Rising edge
|
2020-12-16 04:03:48 -05:00
|
|
|
TEST_ESP_OK(gpio_set_level(TEST_IO_9, 1));
|
|
|
|
printf("Disable the interrupt of GPIO9\n");
|
2019-07-17 23:34:49 -04:00
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
2020-12-16 04:03:48 -05:00
|
|
|
//Disable GPIO9 interrupt, GPIO18 will not respond to the next falling edge interrupt.
|
|
|
|
TEST_ESP_OK(gpio_intr_disable(TEST_IO_9));
|
2019-07-17 23:34:49 -04:00
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
|
|
|
//Falling edge
|
2020-12-16 04:03:48 -05:00
|
|
|
TEST_ESP_OK(gpio_set_level(TEST_IO_9, 0));
|
2019-07-17 23:34:49 -04:00
|
|
|
|
2020-12-16 04:03:48 -05:00
|
|
|
printf("Triggering the interrupt of GPIO10\n");
|
2019-07-17 23:34:49 -04:00
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
2020-12-16 04:03:48 -05:00
|
|
|
TEST_ESP_OK(gpio_set_level(TEST_IO_10, 1));
|
2019-07-17 23:34:49 -04:00
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
|
|
|
//Falling edge
|
2020-12-16 04:03:48 -05:00
|
|
|
TEST_ESP_OK(gpio_set_level(TEST_IO_10, 0));
|
2019-07-17 23:34:49 -04:00
|
|
|
vTaskDelay(100 / portTICK_RATE_MS);
|
2020-12-16 04:03:48 -05:00
|
|
|
TEST_ESP_OK(gpio_isr_handler_remove(TEST_IO_9));
|
|
|
|
TEST_ESP_OK(gpio_isr_handler_remove(TEST_IO_10));
|
2019-07-17 23:34:49 -04:00
|
|
|
gpio_uninstall_isr_service();
|
2020-12-16 04:03:48 -05:00
|
|
|
TEST_ASSERT((io9_param.isr_cnt == 1) && (io10_param.isr_cnt == 1));
|
2020-01-16 22:47:08 -05:00
|
|
|
}
|