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https://github.com/espressif/esp-idf.git
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100 lines
2.2 KiB
C
100 lines
2.2 KiB
C
/**
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** Group: configuration registers */
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/** Type of addr_lock register
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* hardware lock regsiter
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*/
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typedef union {
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struct {
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/** lock : R/W; bitpos: [1:0]; default: 0;
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* read to acquire hardware lock, write to release hardware lock
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*/
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uint32_t lock:2;
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uint32_t reserved_2:30;
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};
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uint32_t val;
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} atomic_addr_lock_reg_t;
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/** Type of lr_addr register
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* gloable lr address regsiter
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*/
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typedef union {
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struct {
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/** gloable_lr_addr : R/W; bitpos: [31:0]; default: 0;
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* backup gloable address
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*/
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uint32_t gloable_lr_addr:32;
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};
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uint32_t val;
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} atomic_lr_addr_reg_t;
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/** Type of lr_value register
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* gloable lr value regsiter
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*/
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typedef union {
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struct {
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/** gloable_lr_value : R/W; bitpos: [31:0]; default: 0;
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* backup gloable value
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*/
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uint32_t gloable_lr_value:32;
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};
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uint32_t val;
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} atomic_lr_value_reg_t;
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/** Type of lock_status register
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* lock status regsiter
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*/
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typedef union {
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struct {
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/** lock_status : RO; bitpos: [1:0]; default: 0;
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* read hareware lock status for debug
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*/
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uint32_t lock_status:2;
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uint32_t reserved_2:30;
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};
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uint32_t val;
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} atomic_lock_status_reg_t;
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/** Type of counter register
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* wait counter register
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*/
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typedef union {
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struct {
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/** wait_counter : R/W; bitpos: [15:0]; default: 0;
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* delay counter
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*/
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uint32_t wait_counter:16;
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uint32_t reserved_16:16;
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};
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uint32_t val;
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} atomic_counter_reg_t;
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typedef struct atomic_dev_t {
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volatile atomic_addr_lock_reg_t addr_lock;
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volatile atomic_lr_addr_reg_t lr_addr;
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volatile atomic_lr_value_reg_t lr_value;
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volatile atomic_lock_status_reg_t lock_status;
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volatile atomic_counter_reg_t counter;
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} atomic_dev_t;
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extern atomic_dev_t ATOMIC_LOCKER;
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#ifndef __cplusplus
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_Static_assert(sizeof(atomic_dev_t) == 0x14, "Invalid size of atomic_dev_t structure");
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#endif
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#ifdef __cplusplus
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}
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#endif
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