mirror of
https://github.com/espressif/esp-idf.git
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172 lines
7.2 KiB
C
172 lines
7.2 KiB
C
// The long term plan is to have a single soc_caps.h for all peripherals.
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// During the refactoring and multichip support development process, we
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// separate these information into periph_caps.h for each peripheral and
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// include them here to avoid developing conflicts.
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#pragma once
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/*-------------------------- COMMON CAPS ---------------------------------------*/
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#define SOC_PCNT_SUPPORTED 1
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#define SOC_TWAI_SUPPORTED 1
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#define SOC_GDMA_SUPPORTED 1
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#define SOC_DEDICATED_GPIO_SUPPORTED 1
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#define SOC_CPU_CORES_NUM 2
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#define SOC_CACHE_SUPPORT_WRAP 1
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#define SOC_ULP_SUPPORTED 1
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#define SOC_RTC_SLOW_MEM_SUPPORTED 1
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#define SOC_CCOMP_TIMER_SUPPORTED 1
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#define SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 3
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/*-------------------------- ADC CAPS ----------------------------------------*/
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#include "adc_caps.h"
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/*-------------------------- BROWNOUT CAPS -----------------------------------*/
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#include "brownout_caps.h"
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/*-------------------------- CPU CAPS ----------------------------------------*/
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#include "cpu_caps.h"
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/*-------------------------- DAC CAPS ----------------------------------------*/
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#include "dac_caps.h"
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/*-------------------------- GDMA CAPS ---------------------------------------*/
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#include "gdma_caps.h"
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/*-------------------------- GPIO CAPS ---------------------------------------*/
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#include "gpio_caps.h"
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/*-------------------------- Dedicated GPIO CAPS -----------------------------*/
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#define SOC_DEDIC_GPIO_OUT_CHANNELS_NUM (4) /*!< 4 outward channels on each CPU core */
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#define SOC_DEDIC_GPIO_IN_CHANNELS_NUM (4) /*!< 4 inward channels on each CPU core */
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/*-------------------------- I2C CAPS ----------------------------------------*/
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#include "i2c_caps.h"
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/*-------------------------- I2S CAPS ----------------------------------------*/
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#include "i2s_caps.h"
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/*-------------------------- LEDC CAPS ---------------------------------------*/
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#include "ledc_caps.h"
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/*-------------------------- MPU CAPS ----------------------------------------*/
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#include "mpu_caps.h"
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/*-------------------------- PCNT CAPS ---------------------------------------*/
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#define SOC_PCNT_PORT_NUM (1)
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#define SOC_PCNT_UNIT_NUM (4)
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#define SOC_PCNT_UNIT_CHANNEL_NUM (2)
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/*-------------------------- RMT CAPS ----------------------------------------*/
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#define SOC_RMT_CHANNEL_MEM_WORDS (48) /*!< Each channel owns 48 words memory (1 word = 4 Bytes) */
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#define SOC_RMT_TX_CHANNELS_NUM (4) /*!< Number of channels that capable of Transmit */
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#define SOC_RMT_RX_CHANNELS_NUM (4) /*!< Number of channels that capable of Receive */
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#define SOC_RMT_CHANNELS_NUM (8) /*!< Total 8 channels (each channel can be configured to either TX or RX) */
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#define SOC_RMT_SUPPORT_RX_PINGPONG (1) /*!< Support Ping-Pong mode on RX path */
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#define SOC_RMT_SUPPORT_RX_DEMODULATION (1) /*!< Support signal demodulation on RX path (i.e. remove carrier) */
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#define SOC_RMT_SUPPORT_TX_LOOP_COUNT (1) /*!< Support transmit specified number of cycles in loop mode */
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#define SOC_RMT_SUPPORT_TX_GROUP (1) /*!< Support a group of TX channels to transmit simultaneously */
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#define SOC_RMT_SUPPORT_XTAL (1) /*!< Support set XTAL clock as the RMT clock source */
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/*-------------------------- RTCIO CAPS --------------------------------------*/
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#include "rtc_io_caps.h"
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/*-------------------------- SIGMA DELTA CAPS --------------------------------*/
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#define SOC_SIGMADELTA_NUM (1) // 1 sigma-delta peripheral
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#define SOC_SIGMADELTA_CHANNEL_NUM (8) // 8 channels
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/*-------------------------- SPI CAPS ----------------------------------------*/
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#include "spi_caps.h"
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/*-------------------------- SPIRAM CAPS ----------------------------------------*/
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#define SOC_SPIRAM_SUPPORTED 1
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/*-------------------------- SYS TIMER CAPS ----------------------------------*/
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#include "systimer_caps.h"
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/*-------------------------- TIMER GROUP CAPS --------------------------------*/
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#define SOC_TIMER_GROUP_SUPPORT_XTAL (1)
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#define SOC_TIMER_GROUP_COUNTER_BIT_WIDTH (54)
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#define SOC_TIMER_GROUP_PRESCALE_BIT_WIDTH (16)
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#define SOC_TIMER_GROUPS (2)
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#define SOC_TIMER_GROUP_TIMERS_PER_GROUP (2)
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#define SOC_TIMER_GROUP_TOTAL_TIMERS (SOC_TIMER_GROUPS * SOC_TIMER_GROUP_TIMERS_PER_GROUP)
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#define SOC_TIMER_GROUP_LAYOUT {2,2}
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/*-------------------------- TOUCH SENSOR CAPS -------------------------------*/
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#include "touch_sensor_caps.h"
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/*-------------------------- TWAI CAPS ---------------------------------------*/
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#include "twai_caps.h"
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/*-------------------------- UART CAPS ---------------------------------------*/
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#include "uart_caps.h"
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#define SOC_UART_SUPPORT_RTC_CLK (1) /*!< Support RTC clock as the clock source */
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#define SOC_UART_SUPPORT_XTAL_CLK (1) /*!< Support XTAL clock as the clock source */
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/*--------------------------- SHA CAPS ---------------------------------------*/
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/* Max amount of bytes in a single DMA operation is 4095,
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for SHA this means that the biggest safe amount of bytes is
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31 blocks of 128 bytes = 3968
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*/
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#define SOC_SHA_DMA_MAX_BUFFER_SIZE (3968)
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#define SOC_SHA_SUPPORT_DMA (1)
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/* The SHA engine is able to resume hashing from a user supplied context */
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#define SOC_SHA_SUPPORT_RESUME (1)
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/* Has a centralized DMA, which is shared with all peripherals */
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#define SOC_SHA_GDMA (1)
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/* Supported HW algorithms */
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#define SOC_SHA_SUPPORT_SHA1 (1)
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#define SOC_SHA_SUPPORT_SHA224 (1)
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#define SOC_SHA_SUPPORT_SHA256 (1)
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#define SOC_SHA_SUPPORT_SHA384 (1)
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#define SOC_SHA_SUPPORT_SHA256 (1)
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#define SOC_SHA_SUPPORT_SHA512 (1)
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#define SOC_SHA_SUPPORT_SHA512_224 (1)
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#define SOC_SHA_SUPPORT_SHA512_256 (1)
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#define SOC_SHA_SUPPORT_SHA512_T (1)
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/* Supported HW algorithms */
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#define SOC_SHA_SUPPORT_SHA1 (1)
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#define SOC_SHA_SUPPORT_SHA256 (1)
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#define SOC_SHA_SUPPORT_SHA384 (1)
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#define SOC_SHA_SUPPORT_SHA512 (1)
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/*--------------------------- RSA CAPS ---------------------------------------*/
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#define SOC_RSA_MAX_BIT_LEN (4096)
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/*-------------------------- AES CAPS -----------------------------------------*/
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#define SOC_AES_SUPPORT_DMA (1)
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/*-------------------------- Power Management CAPS ---------------------------*/
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#define SOC_PM_SUPPORT_EXT_WAKEUP (1)
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#define SOC_PM_SUPPORT_WIFI_WAKEUP (1)
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#define SOC_PM_SUPPORT_BT_WAKEUP (1)
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/* Has a centralized DMA, which is shared with all peripherals */
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#define SOC_AES_GDMA (1)
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#define SOC_AES_SUPPORT_AES_128 (1)
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#define SOC_AES_SUPPORT_AES_256 (1)
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// Attention: These fixed DMA channels are temporarily workaround before we have a centralized DMA controller API to help alloc the channel dynamically
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// Remove them when GDMA driver API is ready
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#define SOC_GDMA_SPI2_DMA_CHANNEL (1)
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#define SOC_GDMA_SPI3_DMA_CHANNEL (2)
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#define SOC_GDMA_SHA_DMA_CHANNEL (3)
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#define SOC_GDMA_AES_DMA_CHANNEL (4)
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/*-------------------------- WI-FI HARDWARE TSF CAPS -------------------------------*/
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#define SOC_WIFI_HW_TSF (1)
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/*-------------------------- COEXISTENCE HARDWARE PTI CAPS -------------------------------*/
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#define SOC_COEX_HW_PTI (1)
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