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c331c85318
For some of the MSPI high frequency setting (e.g. 80M DDR mode Flash or PSRAM), timing tuning is required. Certain delays will be added to the MSPI RX direction. When system clock switches down, the delays should be cleared. When system clock switches up, the delays should be restored.
115 lines
3.5 KiB
C
115 lines
3.5 KiB
C
/*
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* SPDX-FileCopyrightText: 2019-2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* System level MSPI APIs (private)
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*/
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/**
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* Currently the MSPI timing tuning related APIs are designed to be private.
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* Because:
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* 1. now we don't split SPI0 and SPI1, we don't have a component for SPI0, including PSRAM, Cache, etc..
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* 2. SPI0 and SPI1 are strongly coupling.
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*
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* In the future, we may consider creating a component for SPI0, and spi_flash component will only work on SPI1 (and it
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* can rely on SPI0). Therefore, we can put these APIs there.
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*
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*/
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#pragma once
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#include <stdint.h>
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#include <stdbool.h>
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#include "sdkconfig.h"
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#include "esp_err.h"
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#if CONFIG_IDF_TARGET_ESP32
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#include "esp32/rom/spi_flash.h"
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#elif CONFIG_IDF_TARGET_ESP32S2
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#include "esp32s2/rom/spi_flash.h"
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#elif CONFIG_IDF_TARGET_ESP32C3
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#include "esp32c3/rom/spi_flash.h"
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#elif CONFIG_IDF_TARGET_ESP32S3
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#include "esp32s3/rom/spi_flash.h"
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#endif
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#include "esp_flash.h"
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#include "hal/spi_flash_hal.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief To setup Flash chip
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*/
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esp_err_t spi_flash_init_chip_state(void);
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/**
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* @brief Make MSPI work under 20Mhz, remove the timing tuning required delays.
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* @param control_spi1 Select whether to control SPI1. For tuning, we need to use SPI1. After tuning (during startup stage), let the flash driver to control SPI1
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*/
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void spi_timing_enter_mspi_low_speed_mode(bool control_spi1);
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/**
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* @brief Make MSPI work under the frequency as users set, may add certain delays to MSPI RX direction to meet timing requirements.
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* @param control_spi1 Select whether to control SPI1. For tuning, we need to use SPI1. After tuning (during startup stage), let the flash driver to control SPI1
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*/
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void spi_timing_enter_mspi_high_speed_mode(bool control_spi1);
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/**
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* @brief Switch MSPI into low speed mode / high speed mode.
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* @note This API is cache safe, it will freeze both D$ and I$ and restore them after MSPI is switched
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* @note For some of the MSPI high frequency settings (e.g. 80M DDR mode Flash or PSRAM), timing tuning is required.
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* Certain delays will be added to the MSPI RX direction. When CPU clock switches from PLL to XTAL, should call
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* this API first to enter MSPI low speed mode to remove the delays, and vice versa.
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*/
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void spi_timing_change_speed_mode_cache_safe(bool switch_down);
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/**
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* @brief Tune MSPI flash timing to make it work under high frequency
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*/
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void spi_timing_flash_tuning(void);
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/**
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* @brief Tune MSPI psram timing to make it work under high frequency
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*/
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void spi_timing_psram_tuning(void);
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/**
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* @brief To initislize the MSPI pins
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*/
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void esp_mspi_pin_init(void);
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/**
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* @brief Set SPI1 registers to make ROM functions work
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* @note This function is used for setting SPI1 registers to the state that ROM SPI functions work
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*/
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void spi_flash_set_rom_required_regs(void);
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/**
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* @brief Initialize main flash
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* @param chip Pointer to main SPI flash(SPI1 CS0) chip to use..
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*/
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esp_err_t esp_flash_init_main(esp_flash_t *chip);
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/**
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* @brief Should be only used by SPI1 Flash driver to know the necessary timing registers
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* @param out_timing_config Pointer to timing_tuning parameters.
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*/
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void spi_timing_get_flash_timing_param(spi_flash_hal_timing_config_t *out_timing_config);
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/**
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* @brief Get the knowledge if the MSPI timing is tuned or not
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*/
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bool spi_timing_is_tuned(void);
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/**
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* @brief Set Flash chip specifically required MSPI register settings here
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*/
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void spi_flash_set_vendor_required_regs(void);
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#ifdef __cplusplus
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}
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#endif
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