alex/esp-idf
alex/esp-idf
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2 Commits

Author SHA1 Message Date
Armando
c331c85318 mspi: make cpu clock source switch safe 
For some of the MSPI high frequency setting (e.g. 80M DDR mode Flash or PSRAM), timing tuning is required.
Certain delays will be added to the MSPI RX direction. When system clock switches down, the delays should be
cleared. When system clock switches up, the delays should be restored.
 2021-10-19 21:47:27 +08:00
Armando
2655a506c9 mspi: support auto detect octal flash vendor 2021-10-08 15:59:57 +08:00