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68 lines
1.7 KiB
C
68 lines
1.7 KiB
C
/*
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* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "sdkconfig.h"
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#include <sys/param.h>
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#include "soc/soc_caps.h"
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#include "hal/assert.h"
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#include "hal/efuse_hal.h"
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#include "hal/efuse_ll.h"
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#include "esp32s2/rom/efuse.h"
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#define ESP_EFUSE_BLOCK_ERROR_BITS(error_reg, block) ((error_reg) & (0x0F << (4 * (block))))
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uint32_t efuse_hal_get_chip_revision(void)
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{
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return efuse_ll_get_chip_revision();
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}
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/******************* eFuse control functions *************************/
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void efuse_hal_set_timing(uint32_t apb_freq_hz)
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{
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ets_efuse_set_timing(apb_freq_hz);
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}
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void efuse_hal_read(void)
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{
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ets_efuse_read();
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}
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void efuse_hal_clear_program_registers(void)
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{
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ets_efuse_clear_program_registers();
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}
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void efuse_hal_program(uint32_t block)
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{
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ets_efuse_program(block);
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}
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void efuse_hal_rs_calculate(const void *data, void *rs_values)
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{
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ets_efuse_rs_calculate(data, rs_values);
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}
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/******************* eFuse control functions *************************/
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bool efuse_hal_is_coding_error_in_block(unsigned block)
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{
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if (block == 0) {
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for (unsigned i = 0; i < 5; i++) {
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if (REG_READ(EFUSE_RD_REPEAT_ERR0_REG + i * 4)) {
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return true;
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}
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}
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} else if (block <= 10) {
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// EFUSE_RD_RS_ERR0_REG: (hi) BLOCK8, BLOCK7, BLOCK6, BLOCK5, BLOCK4, BLOCK3, BLOCK2, BLOCK1 (low)
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// EFUSE_RD_RS_ERR1_REG: BLOCK10, BLOCK9
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block--;
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uint32_t error_reg = REG_READ(EFUSE_RD_RS_ERR0_REG + (block / 8) * 4);
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return ESP_EFUSE_BLOCK_ERROR_BITS(error_reg, block % 8) != 0;
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}
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return false;
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}
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