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c55a07bf57
Increase LP_UART_EMPTY_THRESH_DEFAULT value to 4. The original value could cause the FIFO become empty before filling next data into the FIFO when the buadrate is high. TX_DONE interrupt would raise before actual transmission complete in such case.
38 lines
1.0 KiB
Python
38 lines
1.0 KiB
Python
# SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
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# SPDX-License-Identifier: CC0-1.0
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import pytest
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input_argv = {
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'esp32': ['uart'],
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'esp32s2': ['uart'],
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'esp32s3': ['uart'],
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'esp32c3': ['uart'],
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'esp32c2': ['uart'],
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'esp32c6': ['uart', 'lp_uart'],
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'esp32h2': ['uart'],
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}
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@pytest.mark.supported_targets
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@pytest.mark.generic
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@pytest.mark.parametrize(
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'config',
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[
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'iram_safe',
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'release',
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],
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indirect=True,
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)
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def test_uart_single_dev(case_tester) -> None: # type: ignore
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dut = case_tester.dut
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chip_type = dut.app.target
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for uart_port in input_argv.get(chip_type, []):
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for case in case_tester.test_menu:
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dut.serial.hard_reset()
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dut._get_ready()
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dut.confirm_write(case.index, expect_str=f'Running {case.name}...')
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dut.expect("select to test 'uart' or 'lp_uart' port", timeout=10)
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dut.write(f'{uart_port}')
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dut.expect_unity_test_output()
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