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esp32s3: initial empty component
This commit is contained in:
morris
parent
3a8f5e45f0
commit
204cb341b1
@ -561,19 +561,6 @@ menu "Power Management"
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If disabled, DFS will not be active until the application
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configures it using esp_pm_configure function.
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config PM_USE_RTC_TIMER_REF
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bool "Use RTC timer to prevent time drift (EXPERIMENTAL)"
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depends on PM_ENABLE && (ESP32S2_TIME_SYSCALL_USE_RTC || ESP32S2_TIME_SYSCALL_USE_RTC_FRC1)
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default n
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help
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When APB clock frequency changes, high-resolution timer (esp_timer)
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scale and base value need to be adjusted. Each adjustment may cause
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small error, and over time such small errors may cause time drift.
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If this option is enabled, RTC timer will be used as a reference to
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compensate for the drift.
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It is recommended that this option is only used if 32k XTAL is selected
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as RTC clock source.
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config PM_PROFILING
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bool "Enable profiling counters for PM locks"
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depends on PM_ENABLE
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4
components/esp32s3/CMakeLists.txt
Normal file
4
components/esp32s3/CMakeLists.txt
Normal file
@ -0,0 +1,4 @@
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idf_build_get_property(target IDF_TARGET)
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if(NOT "${target}" STREQUAL "esp32s3")
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return()
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endif()
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585
components/esp32s3/Kconfig
Normal file
585
components/esp32s3/Kconfig
Normal file
@ -0,0 +1,585 @@
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menu "ESP32S3-Specific"
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visible if IDF_TARGET_ESP32S3
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choice ESP32S3_DEFAULT_CPU_FREQ_MHZ
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prompt "CPU frequency"
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default ESP32S3_DEFAULT_CPU_FREQ_40 if IDF_ENV_FPGA
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default ESP32S3_DEFAULT_CPU_FREQ_160 if !IDF_ENV_FPGA
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help
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CPU frequency to be set on application startup.
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config ESP32S3_DEFAULT_CPU_FREQ_40
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bool "40 MHz"
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depends on IDF_ENV_FPGA
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config ESP32S3_DEFAULT_CPU_FREQ_80
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bool "80 MHz"
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config ESP32S3_DEFAULT_CPU_FREQ_160
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bool "160 MHz"
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config ESP32S3_DEFAULT_CPU_FREQ_240
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bool "240 MHz"
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endchoice
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config ESP32S3_DEFAULT_CPU_FREQ_MHZ
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int
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default 40 if ESP32S3_DEFAULT_CPU_FREQ_40
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default 80 if ESP32S3_DEFAULT_CPU_FREQ_80
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default 160 if ESP32S3_DEFAULT_CPU_FREQ_160
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default 240 if ESP32S3_DEFAULT_CPU_FREQ_240
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menu "Cache config"
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choice ESP32S3_INSTRUCTION_CACHE_SIZE
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prompt "Instruction cache size"
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default ESP32S3_INSTRUCTION_CACHE_16KB
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help
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Instruction cache size to be set on application startup.
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If you use 16KB instruction cache rather than 32KB instruction cache,
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then the other 16KB will be managed by heap allocator.
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config ESP32S3_INSTRUCTION_CACHE_16KB
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bool "16KB"
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config ESP32S3_INSTRUCTION_CACHE_32KB
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bool "32KB"
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endchoice
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config ESP32S3_INSTRUCTION_CACHE_SIZE
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hex
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default 0x4000 if ESP32S3_INSTRUCTION_CACHE_16KB
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default 0x8000 if ESP32S3_INSTRUCTION_CACHE_32KB
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choice ESP32S3_ICACHE_ASSOCIATED_WAYS
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prompt "Instruction cache associated ways"
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default ESP32S3_INSTRUCTION_CACHE_8WAYS
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help
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Instruction cache associated ways to be set on application startup.
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config ESP32S3_INSTRUCTION_CACHE_4WAYS
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bool "4 ways"
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config ESP32S3_INSTRUCTION_CACHE_8WAYS
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bool "8 ways"
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endchoice
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config ESP32S3_ICACHE_ASSOCIATED_WAYS
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int
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default 4 if ESP32S3_INSTRUCTION_CACHE_4WAYS
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default 8 if ESP32S3_INSTRUCTION_CACHE_8WAYS
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choice ESP32S3_INSTRUCTION_CACHE_LINE_SIZE
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prompt "Instruction cache line size"
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default ESP32S3_INSTRUCTION_CACHE_LINE_32B
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help
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Instruction cache line size to be set on application startup.
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config ESP32S3_INSTRUCTION_CACHE_LINE_16B
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bool "16 Bytes"
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depends on ESP32S3_INSTRUCTION_CACHE_16KB
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config ESP32S3_INSTRUCTION_CACHE_LINE_32B
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bool "32 Bytes"
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endchoice
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config ESP32S3_INSTRUCTION_CACHE_LINE_SIZE
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int
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default 16 if ESP32S3_INSTRUCTION_CACHE_LINE_16B
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default 32 if ESP32S3_INSTRUCTION_CACHE_LINE_32B
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config ESP32S3_INSTRUCTION_CACHE_WRAP
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bool "Enable instruction cache wrap mode"
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default "n"
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help
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If enabled, instruction cache will use wrap mode to read spi flash or spi ram.
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The wrap length equals to ESP32S3_INSTRUCTION_CACHE_LINE_SIZE.
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However, it depends on complex conditions.
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choice ESP32S3_DATA_CACHE_SIZE
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prompt "Data cache size"
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default ESP32S3_DATA_CACHE_32KB
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help
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Data cache size to be set on application startup.
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If you use 32KB data cache rather than 64KB data cache,
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the other 32KB will be added to the heap.
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config ESP32S3_DATA_CACHE_16KB
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bool "16KB"
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config ESP32S3_DATA_CACHE_32KB
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bool "32KB"
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config ESP32S3_DATA_CACHE_64KB
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bool "64KB"
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endchoice
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config ESP32S3_DATA_CACHE_SIZE
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hex
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default 0x4000 if ESP32S3_DATA_CACHE_16KB
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default 0x8000 if ESP32S3_DATA_CACHE_32KB
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default 0x10000 if ESP32S3_DATA_CACHE_64KB
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choice ESP32S3_DCACHE_ASSOCIATED_WAYS
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prompt "Data cache associated ways"
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default ESP32S3_DATA_CACHE_8WAYS
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help
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Data cache associated ways to be set on application startup.
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config ESP32S3_DATA_CACHE_4WAYS
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bool "4 ways"
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config ESP32S3_DATA_CACHE_8WAYS
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bool "8 ways"
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endchoice
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config ESP32S3_DCACHE_ASSOCIATED_WAYS
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int
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default 4 if ESP32S3_DATA_CACHE_4WAYS
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default 8 if ESP32S3_DATA_CACHE_8WAYS
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choice ESP32S3_DATA_CACHE_LINE_SIZE
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prompt "Data cache line size"
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default ESP32S3_DATA_CACHE_LINE_32B
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help
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Data cache line size to be set on application startup.
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config ESP32S3_DATA_CACHE_LINE_16B
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bool "16 Bytes"
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depends on ESP32S3_DATA_CACHE_16KB || ESP32S3_DATA_CACHE_32KB
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config ESP32S3_DATA_CACHE_LINE_32B
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bool "32 Bytes"
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endchoice
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config ESP32S3_DATA_CACHE_LINE_SIZE
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int
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default 16 if ESP32S3_DATA_CACHE_LINE_16B
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default 32 if ESP32S3_DATA_CACHE_LINE_32B
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config ESP32S3_DATA_CACHE_WRAP
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bool "Enable data cache wrap mode"
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default "n"
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help
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If enabled, data cache will use wrap mode to read spi flash or spi ram.
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The wrap length equals to ESP32S3_DATA_CACHE_LINE_SIZE.
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However, it depends on complex conditions.
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endmenu # Cache config
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# Hint: to support SPIRAM across multiple chips, check CONFIG_SPIRAM instead
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config ESP32S3_SPIRAM_SUPPORT
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bool "Support for external, SPI-connected RAM"
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default "n"
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select SPIRAM
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help
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This enables support for an external SPI RAM chip, connected in parallel with the
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main SPI flash chip.
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menu "SPI RAM config"
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depends on ESP32S3_SPIRAM_SUPPORT
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choice SPIRAM_TYPE
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prompt "Type of SPI RAM chip in use"
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default SPIRAM_TYPE_ESPPSRAM32
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config SPIRAM_TYPE_ESPPSRAM32
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bool "ESP-PSRAM32 or IS25WP032"
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config SPIRAM_TYPE_ESPPSRAM64
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bool "ESP-PSRAM64 or LY68L6400"
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endchoice
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config SPIRAM_SIZE
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int
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default 4194304 if SPIRAM_TYPE_ESPPSRAM32
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default 8388608 if SPIRAM_TYPE_ESPPSRAM64
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default 0
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menu "PSRAM Clock and CS IO for ESP32S3"
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depends on ESP32S3_SPIRAM_SUPPORT
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config DEFAULT_PSRAM_CLK_IO
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int "PSRAM CLK IO number"
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range 0 33
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default 30
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help
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The PSRAM Clock IO can be any unused GPIO, please refer to your hardware design.
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config DEFAULT_PSRAM_CS_IO
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int "PSRAM CS IO number"
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range 0 33
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default 26
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help
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The PSRAM CS IO can be any unused GPIO, please refer to your hardware design.
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endmenu
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config SPIRAM_SPIWP_SD3_PIN
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int "SPI PSRAM WP(SD3) Pin when customizing pins via eFuse (read help)"
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depends on ESPTOOLPY_FLASHMODE_DIO || ESPTOOLPY_FLASHMODE_DOUT
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range 0 33
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default 28
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help
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This value is ignored unless flash mode is set to DIO or DOUT and the SPI flash pins have been
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overridden by setting the eFuses SPI_PAD_CONFIG_xxx.
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Different from esp32 chip, on esp32-s3, the WP pin would also be defined in efuse.
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This value would only be used if the WP pin recorded in efuse SPI_PAD_CONFIG_xxx is invalid.
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When flash mode is set to QIO or QOUT,
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the PSRAM WP pin will be set as the value configured in bootloader.
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config SPIRAM_FETCH_INSTRUCTIONS
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bool "Cache fetch instructions from SPI RAM"
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default n
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help
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If enabled, instruction in flash will be copied into SPIRAM.
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If SPIRAM_RODATA also enabled, you can run the instruction when erasing or programming the flash.
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config SPIRAM_RODATA
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bool "Cache load read only data from SPI RAM"
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default n
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help
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If enabled, rodata in flash will be copied into SPIRAM.
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If SPIRAM_FETCH_INSTRUCTIONS is also enabled,
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you can run the instruction when erasing or programming the flash.
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choice SPIRAM_SPEED
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prompt "Set RAM clock speed"
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default SPIRAM_SPEED_40M
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help
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Select the speed for the SPI RAM chip.
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If SPI RAM is enabled, we only support three combinations of SPI speed mode we supported now:
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1. Flash SPI running at 40Mhz and RAM SPI running at 40Mhz
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2. Flash SPI running at 80Mhz and RAM SPI running at 40Mhz
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3. Flash SPI running at 80Mhz and RAM SPI running at 80Mhz
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config SPIRAM_SPEED_80M
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bool "80MHz clock speed"
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config SPIRAM_SPEED_40M
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bool "40Mhz clock speed"
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config SPIRAM_SPEED_26M
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bool "26Mhz clock speed"
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config SPIRAM_SPEED_20M
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bool "20Mhz clock speed"
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endchoice
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# insert non-chip-specific items here
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source "$IDF_PATH/components/esp_common/Kconfig.spiram.common"
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endmenu
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config ESP32S3_MEMMAP_TRACEMEM
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bool
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default "n"
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config ESP32S3_MEMMAP_TRACEMEM_TWOBANKS
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bool
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default "n"
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config ESP32S3_TRAX
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bool "Use TRAX tracing feature"
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default "n"
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select ESP32S3_MEMMAP_TRACEMEM
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help
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The esp32-s3 contains a feature which allows you to trace the execution path the processor
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has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
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of memory that can't be used for general purposes anymore. Disable this if you do not know
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what this is.
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config ESP32S3_TRAX_TWOBANKS
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bool "Reserve memory for tracing both pro as well as app cpu execution"
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default "n"
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depends on ESP32S3_TRAX && !FREERTOS_UNICORE
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select ESP32S3_MEMMAP_TRACEMEM_TWOBANKS
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help
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The esp32-s3 contains a feature which allows you to trace the execution path the processor
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has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
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of memory that can't be used for general purposes anymore. Disable this if you do not know
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what this is.
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config ESP32S3_TRACEMEM_RESERVE_DRAM
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hex
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default 0x8000 if ESP32S3_MEMMAP_TRACEMEM && ESP32S3_MEMMAP_TRACEMEM_TWOBANKS
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default 0x4000 if ESP32S3_MEMMAP_TRACEMEM && !ESP32S3_MEMMAP_TRACEMEM_TWOBANKS
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default 0x0
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choice ESP32S3_UNIVERSAL_MAC_ADDRESSES
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bool "Number of universally administered (by IEEE) MAC address"
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default ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO
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help
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Configure the number of universally administered (by IEEE) MAC addresses.
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During initialization, MAC addresses for each network interface are generated or derived from a
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single base MAC address.
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If the number of universal MAC addresses is Two, all interfaces (WiFi station, WiFi softap) receive a
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universally administered MAC address. They are generated sequentially by adding 0, and 1 (respectively)
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to the final octet of the base MAC address. If the number of universal MAC addresses is one,
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only WiFi station receives a universally administered MAC address.
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It's generated by adding 0 to the base MAC address.
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The WiFi softap receives local MAC addresses. It's derived from the universal WiFi station MAC addresses.
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When using the default (Espressif-assigned) base MAC address, either setting can be used. When using
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a custom universal MAC address range, the correct setting will depend on the allocation of MAC
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addresses in this range (either 1 or 2 per device.)
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config ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO
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bool "Two"
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select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
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select ESP_MAC_ADDR_UNIVERSE_BT
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config ESP32S3_UNIVERSAL_MAC_ADDRESSES_THREE
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bool "Three"
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select ESP_MAC_ADDR_UNIVERSE_WIFI_STA
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select ESP_MAC_ADDR_UNIVERSE_WIFI_AP
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select ESP_MAC_ADDR_UNIVERSE_BT
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endchoice
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config ESP32S3_UNIVERSAL_MAC_ADDRESSES
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int
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default 2 if ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO
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default 3 if ESP32S3_UNIVERSAL_MAC_ADDRESSES_THREE
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config ESP_MAC_ADDR_UNIVERSE_BT_OFFSET
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int
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default 2 if ESP32S3_UNIVERSAL_MAC_ADDRESSES_THREE
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default 1 if ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO
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config ESP32S3_ULP_COPROC_ENABLED
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bool "Enable Ultra Low Power (ULP) Coprocessor"
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default "n"
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help
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Set to 'y' if you plan to load a firmware for the coprocessor.
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If this option is enabled, further coprocessor configuration will appear in the Components menu.
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config ESP32S3_ULP_COPROC_RESERVE_MEM
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int
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prompt "RTC slow memory reserved for coprocessor" if ESP32S3_ULP_COPROC_ENABLED
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default 512 if ESP32S3_ULP_COPROC_ENABLED
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range 32 8192 if ESP32S3_ULP_COPROC_ENABLED
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default 0 if !ESP32S3_ULP_COPROC_ENABLED
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range 0 0 if !ESP32S3_ULP_COPROC_ENABLED
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help
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Bytes of memory to reserve for ULP coprocessor firmware & data.
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Data is reserved at the beginning of RTC slow memory.
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config ESP32S3_DEBUG_OCDAWARE
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bool "Make exception and panic handlers JTAG/OCD aware"
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default y
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select FREERTOS_DEBUG_OCDAWARE
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help
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The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
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instead of panicking, have the debugger stop on the offending instruction.
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config ESP32S3_DEBUG_STUBS_ENABLE
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bool "OpenOCD debug stubs"
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default COMPILER_OPTIMIZATION_LEVEL_DEBUG
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depends on !ESP32S3_TRAX
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help
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Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging,
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e.g. GCOV data dump.
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config ESP32S3_BROWNOUT_DET
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bool "Hardware brownout detect & reset"
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default y
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help
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The ESP32-S3 has a built-in brownout detector which can detect if the voltage is lower than
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a specific value. If this happens, it will reset the chip in order to prevent unintended
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behaviour.
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choice ESP32S3_BROWNOUT_DET_LVL_SEL
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prompt "Brownout voltage level"
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depends on ESP32S3_BROWNOUT_DET
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default ESP32S3_BROWNOUT_DET_LVL_SEL_7
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help
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The brownout detector will reset the chip when the supply voltage is approximately
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below this level. Note that there may be some variation of brownout voltage level
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between each ESP3-S3 chip.
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#The voltage levels here are estimates, more work needs to be done to figure out the exact voltages
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#of the brownout threshold levels.
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config ESP32S3_BROWNOUT_DET_LVL_SEL_7
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bool "2.44V"
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config ESP32S3_BROWNOUT_DET_LVL_SEL_6
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bool "2.56V"
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config ESP32S3_BROWNOUT_DET_LVL_SEL_5
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bool "2.67V"
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config ESP32S3_BROWNOUT_DET_LVL_SEL_4
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bool "2.84V"
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config ESP32S3_BROWNOUT_DET_LVL_SEL_3
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bool "2.98V"
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config ESP32S3_BROWNOUT_DET_LVL_SEL_2
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bool "3.19V"
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config ESP32S3_BROWNOUT_DET_LVL_SEL_1
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bool "3.30V"
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endchoice
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config ESP32S3_BROWNOUT_DET_LVL
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int
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default 1 if ESP32S3_BROWNOUT_DET_LVL_SEL_1
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default 2 if ESP32S3_BROWNOUT_DET_LVL_SEL_2
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default 3 if ESP32S3_BROWNOUT_DET_LVL_SEL_3
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default 4 if ESP32S3_BROWNOUT_DET_LVL_SEL_4
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default 5 if ESP32S3_BROWNOUT_DET_LVL_SEL_5
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||||
default 6 if ESP32S3_BROWNOUT_DET_LVL_SEL_6
|
||||
default 7 if ESP32S3_BROWNOUT_DET_LVL_SEL_7
|
||||
|
||||
|
||||
# Note about the use of "FRC1" name: currently FRC1 timer is not used for
|
||||
# high resolution timekeeping anymore. Instead the esp_timer API, implemented
|
||||
# using FRC2 timer, is used.
|
||||
# FRC1 name in the option name is kept for compatibility.
|
||||
choice ESP32S3_TIME_SYSCALL
|
||||
prompt "Timers used for gettimeofday function"
|
||||
default ESP32S3_TIME_SYSCALL_USE_RTC_FRC1
|
||||
help
|
||||
This setting defines which hardware timers are used to
|
||||
implement 'gettimeofday' and 'time' functions in C library.
|
||||
|
||||
- If both high-resolution and RTC timers are used, timekeeping will
|
||||
continue in deep sleep. Time will be reported at 1 microsecond
|
||||
resolution. This is the default, and the recommended option.
|
||||
- If only high-resolution timer is used, gettimeofday will
|
||||
provide time at microsecond resolution.
|
||||
Time will not be preserved when going into deep sleep mode.
|
||||
- If only RTC timer is used, timekeeping will continue in
|
||||
deep sleep, but time will be measured at 6.(6) microsecond
|
||||
resolution. Also the gettimeofday function itself may take
|
||||
longer to run.
|
||||
- If no timers are used, gettimeofday and time functions
|
||||
return -1 and set errno to ENOSYS.
|
||||
- When RTC is used for timekeeping, two RTC_STORE registers are
|
||||
used to keep time in deep sleep mode.
|
||||
|
||||
config ESP32S3_TIME_SYSCALL_USE_RTC_FRC1
|
||||
bool "RTC and high-resolution timer"
|
||||
config ESP32S3_TIME_SYSCALL_USE_RTC
|
||||
bool "RTC"
|
||||
config ESP32S3_TIME_SYSCALL_USE_FRC1
|
||||
bool "High-resolution timer"
|
||||
config ESP32S3_TIME_SYSCALL_USE_NONE
|
||||
bool "None"
|
||||
endchoice
|
||||
|
||||
choice ESP32S3_RTC_CLK_SRC
|
||||
prompt "RTC clock source"
|
||||
default ESP32S3_RTC_CLK_SRC_INT_RC
|
||||
help
|
||||
Choose which clock is used as RTC clock source.
|
||||
|
||||
config ESP32S3_RTC_CLK_SRC_INT_RC
|
||||
bool "Internal 150kHz RC oscillator"
|
||||
config ESP32S3_RTC_CLK_SRC_EXT_CRYS
|
||||
bool "External 32kHz crystal"
|
||||
select ESP_SYSTEM_RTC_EXT_XTAL
|
||||
config ESP32S3_RTC_CLK_SRC_EXT_OSC
|
||||
bool "External 32kHz oscillator at 32K_XP pin"
|
||||
config ESP32S3_RTC_CLK_SRC_INT_8MD256
|
||||
bool "Internal 8MHz oscillator, divided by 256 (~32kHz)"
|
||||
endchoice
|
||||
|
||||
config ESP32S3_RTC_CLK_CAL_CYCLES
|
||||
int "Number of cycles for RTC_SLOW_CLK calibration"
|
||||
default 3000 if ESP32S3_RTC_CLK_SRC_EXT_CRYS
|
||||
default 1024 if ESP32S3_RTC_CLK_SRC_INT_RC
|
||||
range 0 125000
|
||||
help
|
||||
When the startup code initializes RTC_SLOW_CLK, it can perform
|
||||
calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
|
||||
frequency. This option sets the number of RTC_SLOW_CLK cycles measured
|
||||
by the calibration routine. Higher numbers increase calibration
|
||||
precision, which may be important for applications which spend a lot of
|
||||
time in deep sleep. Lower numbers reduce startup time.
|
||||
|
||||
When this option is set to 0, clock calibration will not be performed at
|
||||
startup, and approximate clock frequencies will be assumed:
|
||||
|
||||
- 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
|
||||
- 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
|
||||
In case more value will help improve the definition of the launch of the crystal.
|
||||
If the crystal could not start, it will be switched to internal RC.
|
||||
|
||||
config ESP32S3_NO_BLOBS
|
||||
bool "No Binary Blobs"
|
||||
depends on !BT_ENABLED
|
||||
default n
|
||||
help
|
||||
If enabled, this disables the linking of binary libraries in the application build. Note
|
||||
that after enabling this Wi-Fi/Bluetooth will not work.
|
||||
|
||||
config ESP32S3_RTCDATA_IN_FAST_MEM
|
||||
bool "Place RTC_DATA_ATTR and RTC_RODATA_ATTR variables into RTC fast memory segment"
|
||||
default n
|
||||
help
|
||||
This option allows to place .rtc_data and .rtc_rodata sections into
|
||||
RTC fast memory segment to free the slow memory region for ULP programs.
|
||||
|
||||
config ESP32S3_USE_FIXED_STATIC_RAM_SIZE
|
||||
bool "Use fixed static RAM size"
|
||||
default n
|
||||
help
|
||||
If this option is disabled, the DRAM part of the heap starts right after the .bss section,
|
||||
within the dram0_0 region. As a result, adding or removing some static variables
|
||||
will change the available heap size.
|
||||
|
||||
If this option is enabled, the DRAM part of the heap starts right after the dram0_0 region,
|
||||
where its length is set with ESP32S3_FIXED_STATIC_RAM_SIZE
|
||||
|
||||
config ESP32S3_FIXED_STATIC_RAM_SIZE
|
||||
hex "Fixed Static RAM size"
|
||||
default 0x10000
|
||||
range 0 0x34000
|
||||
depends on ESP32S3_USE_FIXED_STATIC_RAM_SIZE
|
||||
help
|
||||
RAM size dedicated for static variables (.data & .bss sections).
|
||||
|
||||
config ESP32S3_ALLOW_RTC_FAST_MEM_AS_HEAP
|
||||
bool "Enable RTC fast memory for dynamic allocations"
|
||||
depends on !ESP32S3_MEMPROT_FEATURE
|
||||
default y
|
||||
help
|
||||
This config option allows to add RTC fast memory region to system heap with capability
|
||||
similar to that of DRAM region but without DMA. This memory will be consumed first per
|
||||
heap initialization order by early startup services and scheduler related code. Speed
|
||||
wise RTC fast memory operates on APB clock and hence does not have much performance impact.
|
||||
|
||||
endmenu # ESP32S3-Specific
|
||||
|
||||
menu "Power Management"
|
||||
config PM_ENABLE
|
||||
bool "Support for power management"
|
||||
default n
|
||||
help
|
||||
If enabled, application is compiled with support for power management.
|
||||
This option has run-time overhead (increased interrupt latency,
|
||||
longer time to enter idle state), and it also reduces accuracy of
|
||||
RTOS ticks and timers used for timekeeping.
|
||||
Enable this option if application uses power management APIs.
|
||||
|
||||
config PM_DFS_INIT_AUTO
|
||||
bool "Enable dynamic frequency scaling (DFS) at startup"
|
||||
depends on PM_ENABLE
|
||||
default n
|
||||
help
|
||||
If enabled, startup code configures dynamic frequency scaling.
|
||||
Max CPU frequency is set to CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ setting,
|
||||
min frequency is set to XTAL frequency.
|
||||
If disabled, DFS will not be active until the application
|
||||
configures it using esp_pm_configure function.
|
||||
|
||||
config PM_PROFILING
|
||||
bool "Enable profiling counters for PM locks"
|
||||
depends on PM_ENABLE
|
||||
default n
|
||||
help
|
||||
If enabled, esp_pm_* functions will keep track of the amount of time
|
||||
each of the power management locks has been held, and esp_pm_dump_locks
|
||||
function will print this information.
|
||||
This feature can be used to analyze which locks are preventing the chip
|
||||
from going into a lower power state, and see what time the chip spends
|
||||
in each power saving mode. This feature does incur some run-time
|
||||
overhead, so should typically be disabled in production builds.
|
||||
|
||||
config PM_TRACE
|
||||
bool "Enable debug tracing of PM using GPIOs"
|
||||
depends on PM_ENABLE
|
||||
default n
|
||||
help
|
||||
If enabled, some GPIOs will be used to signal events such as RTOS ticks,
|
||||
frequency switching, entry/exit from idle state. Refer to pm_trace.c
|
||||
file for the list of GPIOs.
|
||||
This feature is intended to be used when analyzing/debugging behavior
|
||||
of power management implementation, and should be kept disabled in
|
||||
applications.
|
||||
|
||||
|
||||
endmenu # "Power Management"
|
||||
0
components/esp32s3/Makefile.projbuild
Normal file
0
components/esp32s3/Makefile.projbuild
Normal file
7
components/esp32s3/README.md
Normal file
7
components/esp32s3/README.md
Normal file
@ -0,0 +1,7 @@
|
||||
# ESP32-S3 component
|
||||
|
||||
This directory contains support for the upcoming ESP32-S3 SoC. This code is **still work in progress and not intended for public use**.
|
||||
|
||||
Please follow announcements on [espressif.com](https://www.espressif.com/) and [esp32.com](https://esp32.com/) to be informed about the ESP32-S3 SoC.
|
||||
|
||||
*This note will be removed once the ESP32-S3 initial support is ready.*
|
||||
5
components/esp32s3/component.mk
Normal file
5
components/esp32s3/component.mk
Normal file
@ -0,0 +1,5 @@
|
||||
#
|
||||
# Component Makefile
|
||||
#
|
||||
# ESP32-S3 is not supported in GNU Make build system
|
||||
COMPONENT_CONFIG_ONLY := 1
|
||||
Loading…
x
Reference in New Issue
Block a user