esp-idf

mirror of https://github.com/espressif/esp-idf.git synced 2024-09-20 10:46:02 -04:00

History

Sudeep Mohanty b72f987c5c ulp: Added ULP RISC-V support for esp32s3 This commit adds support for ULP RISC-V for esp32s3. Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>		2022-06-22 13:33:14 +08:00
..
esp32	soc_caps: add SOC_PM_SUPPORT_RTC_PERIPH_PD	2022-06-06 00:17:39 +08:00
esp32c3	Merge branch 'bugfix/c3_efuse_fail_bits_v4.4' into 'release/v4.4'	2022-06-09 10:53:31 +08:00
esp32h2	Merge branch 'bugfix/i2c_timeout_issue_v4.4' into 'release/v4.4'	2022-06-08 14:12:37 +08:00
esp32s2	rmt: fix error in rmt register file	2022-06-14 22:10:00 +08:00
esp32s3	ulp: Added ULP RISC-V support for esp32s3	2022-06-22 13:33:14 +08:00
include/soc	lcd: unify callback prototype	2021-10-02 14:23:31 +08:00
CMakeLists.txt	Merge branch 'refactor/move_ldscript_to_soc' into 'master'	2021-07-23 11:54:56 +00:00
component.mk	soc: move peripheral linker scripts out of target component	2021-07-22 12:55:01 +08:00
linker.lf	soc: move implementations to esp_hw_support	2020-10-28 22:38:50 +08:00
lldesc.c	crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc	2021-05-18 11:25:41 +08:00
README.md	soc: descriptive part occupy whole component	2020-10-28 07:21:29 +08:00
soc_include_legacy_warn.c	Whitespace: Automated whitespace fixes (large commit)	2020-11-11 07:36:35 +00:00

README.md

`soc`

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware