esp-idf/components/esp_system/port/soc/esp32c2
Gustavo Henrique Nihei 3cbac3dd1d esp_system: Ensure TIMG0 clock is always enabled during normal operation
If the TimerGroup 0 clock is disabled and then reenabled, the watchdog
registers (Flashboot protection included) will be re-enabled, and some
seconds later, will trigger an unintended reset.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2023-03-06 04:58:11 +00:00
..
cache_err_int.c bugfix: esprv_intc_int_set_type() should not use bitmap parameter 2022-10-14 11:31:22 +08:00
clk.c esp_system: Ensure TIMG0 clock is always enabled during normal operation 2023-03-06 04:58:11 +00:00
CMakeLists.txt esp32c2: fix gcov example build 2022-07-28 13:59:29 +02:00
Kconfig.cache kconfig: move remaining kconfig options out of target component 2022-05-23 17:57:45 +08:00
Kconfig.cpu soc: moved kconfig options out of the target component. 2022-04-21 12:09:43 +08:00
Kconfig.system system: move kconfig options out of target component 2022-03-02 01:22:26 +00:00
reset_reason.c esp32c2: support rtc time feature depend on rtc memory, since c2 does not have rtc memory 2023-02-02 20:25:59 +08:00
system_internal.c usb_serial_jtag: Improve the code for the issue of usb cdc device unable to work during sleep 2023-02-27 12:10:49 +08:00