Song Ruo Jing c55a07bf57 refactor(uart): add support to be able to test LP_UART port
Increase LP_UART_EMPTY_THRESH_DEFAULT value to 4. The original value
could cause the FIFO become empty before filling next data into the FIFO
when the buadrate is high. TX_DONE interrupt would raise before actual
transmission complete in such case.
2024-04-15 19:39:30 +08:00
..
2022-05-07 19:20:44 +08:00
2022-01-19 11:08:57 +08:00
2022-01-19 11:08:57 +08:00