esp-idf/components/ulp
Sudeep Mohanty f709faea7c ulp: Keep RTC_CNTL_COCPU_SHUT_RESET_EN set for ULP RISC-V
RTC_CNTL_COCPU_SHUT_RESET_EN register was being reset during ULP RISC-V
initialization which does not let the ULP RISC-V coprocessor to reset
after it goes to halt. For proper operation of the coprocessor, it must
be reset after each cycle and hence this commit keeps
RTC_CNTL_COCPU_SHUT_RESET_EN set.
2022-04-28 13:41:07 +05:30
..
cmake
ld
test CI: disable S3 sleep related example tests 2022-03-21 11:56:01 +08:00
ulp_common
ulp_fsm ulp: temporarily disable ULP support for S3 2022-03-25 14:19:12 +08:00
ulp_riscv ulp: Keep RTC_CNTL_COCPU_SHUT_RESET_EN set for ULP RISC-V 2022-04-28 13:41:07 +05:30
CMakeLists.txt
component_ulp_common.cmake
esp32ulp_mapgen.py
Kconfig
project_include.cmake
sdkconfig.rename.esp32 soc: moved kconfig options out of the target component. 2022-04-21 12:09:43 +08:00
sdkconfig.rename.esp32s2 soc: moved kconfig options out of the target component. 2022-04-21 12:09:43 +08:00
toolchain_ulp_version.mk