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For some of the MSPI high frequency setting (e.g. 80M DDR mode Flash or PSRAM), timing tuning is required. Certain delays will be added to the MSPI RX direction. When system clock switches down, the delays should be cleared. When system clock switches up, the delays should be restored. |
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.. | ||
main | ||
app_test.py | ||
CMakeLists.txt | ||
README.md | ||
sdkconfig.ci.default | ||
sdkconfig.ci.f4r4_40sdr_120sdr | ||
sdkconfig.ci.f4r4_80sdr_80sdr | ||
sdkconfig.ci.f4r4_120sdr | ||
sdkconfig.ci.f4r4_120sdr_40sdr | ||
sdkconfig.ci.f4r4_120sdr_120sdr | ||
sdkconfig.ci.f4r4_120sdr_os_silent | ||
sdkconfig.ci.f4r8_80sdr_40ddr | ||
sdkconfig.ci.f4r8_80sdr_80ddr | ||
sdkconfig.ci.f4r8_120sdr | ||
sdkconfig.ci.f8r8_40ddr_40ddr | ||
sdkconfig.ci.f8r8_40ddr_80ddr | ||
sdkconfig.ci.f8r8_80ddr_40ddr | ||
sdkconfig.ci.f8r8_80ddr_80ddr | ||
sdkconfig.ci.f8r8_80sdr_80ddr | ||
sdkconfig.ci.f8r8_120sdr |
Supported Targets | ESP32-S3 |
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This project tests if Flash and PSRAM can work under different configurations. To add new configuration, create one more sdkconfig.ci.NAME file in this directory.
If you need to test for anything other than flash and psram, create another test project.