Darian Leung a77e5cc718 refactor(hal/usb): Remove usb_fsls_phy_ll.h ... For targets that only contain a USJ peripheral (and not a DWC OTG), their 'usb_fsls_phy_ll.h' headers only contain a single function ('usb_fsls_phy_ll_int_jtag_enable()') whose feature is already covered by functions in 'usb_serial_jtag_ll.h'. Thus, this header is redundant. This commit does the following: - Remove 'usb_fsls_phy_ll.h' for targets that only contain a USJ peripheral - Rename 'usb_fsls_phy_[hal|ll].[h|c]' to `usb_wrap_[hal|ll].[h|c]` for targets that contain a DWC OTG peripheral. This better reflects the underlying peripheral that the LL header accesses.		2024-03-18 19:23:43 +08:00
..
esp32	feat(all): Use PRIx macro in all logs	2024-03-12 11:15:53 +02:00
esp32c2	Merge branch 'feature/optimize_chips_active_power' into 'master'	2024-03-14 12:08:33 +08:00
esp32c3	refactor(hal/usb): Remove usb_fsls_phy_ll.h	2024-03-18 19:23:43 +08:00
esp32c5	feat(all): Use PRIx macro in all logs	2024-03-12 11:15:53 +02:00
esp32c6	refactor(hal/usb): Remove usb_fsls_phy_ll.h	2024-03-18 19:23:43 +08:00
esp32c61	feat(esp32c61): introduce target esp32c61	2024-03-01 21:12:25 +08:00
esp32h2	refactor(hal/usb): Remove usb_fsls_phy_ll.h	2024-03-18 19:23:43 +08:00
esp32p4	feat(all): Use PRIx macro in all logs	2024-03-12 11:15:53 +02:00
esp32s2	feat(all): Use PRIx macro in all logs	2024-03-12 11:15:53 +02:00
esp32s3	refactor(hal/usb): Remove usb_fsls_phy_ll.h	2024-03-18 19:23:43 +08:00
linux	feat(esp_system): Partially buildable on Linux now	2022-11-16 09:03:09 +01:00