Wan Lei a7355d3aba Merge branch 'feat/c6lite_c61_g0_component_s4' into 'master'
feat(esp32c61): add G0 component (hal, riscv) support (stage 4/8)

See merge request espressif/esp-idf!29551
2024-03-20 10:09:42 +08:00
..

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware