esp-idf/components/soc
2024-08-06 10:16:34 +08:00
..
esp32 change(wdt): create wdt_periph.c in soc component 2024-06-18 09:59:06 +08:00
esp32c2 feat(dedic_gpio): add support for esp32c5 2024-07-17 17:56:43 +08:00
esp32c3 feat(dedic_gpio): add support for esp32c5 2024-07-17 17:56:43 +08:00
esp32c5 refactor(i2s): refactor to use i2s etm controlling 2024-08-06 10:16:34 +08:00
esp32c6 change(ulp): bu lp i2c on esp32c5 2024-08-01 14:48:31 +08:00
esp32c61 refactor(i2s): refactor to use i2s etm controlling 2024-08-06 10:16:34 +08:00
esp32h2 feat(mmu): added 8KB mmu page size option for c6 h2 2024-07-29 16:16:36 +08:00
esp32p4 refactor(i2s): refactor to use i2s etm controlling 2024-08-06 10:16:34 +08:00
esp32s2 feat(dedic_gpio): add support for esp32c5 2024-07-17 17:56:43 +08:00
esp32s3 feat(dedic_gpio): add support for esp32c5 2024-07-17 17:56:43 +08:00
include/soc feat(lp_i2s): lp_i2s driver 2024-08-02 12:02:05 +08:00
linux/include/soc feat(efuse): Support Linux target 2024-05-15 16:54:45 +03:00
CMakeLists.txt feat(debug_probe): added debug probe hal driver 2024-07-29 15:23:18 +08:00
dport_access_common.c dport: Move DPORT workaround to G0 2022-05-31 13:44:18 +08:00
Kconfig feat(mmu): added 8KB mmu page size option for c6 h2 2024-07-29 16:16:36 +08:00
linker.lf soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
lldesc.c crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc 2021-05-18 11:25:41 +08:00
README.md soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware