esp-idf

mirror of https://github.com/espressif/esp-idf.git synced 2024-10-05 20:47:46 -04:00

History

Michael (XIAO Xufeng) d910d42a8d Merge branch 'bugfix/soc_interrupt_source' into 'master' soc: remove outdated description of interrupts on RISCV CPUs See merge request espressif/esp-idf!14974		2021-08-30 09:38:24 +00:00
..
esp32	Merge branch 'feature/mcpwm_bldc_hall_example' into 'master'	2021-08-26 08:28:27 +00:00
esp32c3	soc: remove outdated description of interrupts on RISCV CPUs	2021-08-30 17:38:16 +08:00
esp32h2	Merge branch 'bugfix/soc_interrupt_source' into 'master'	2021-08-30 09:38:24 +00:00
esp32s2	ESP32S2: No assert()/abort() in Memprot API, use esp_err_t instead	2021-08-26 09:20:00 +02:00
esp32s3	mcpwm: update register file according to TRM	2021-08-24 15:38:46 +08:00
include/soc	Merge branch 'refactor/pcnt_driver_esp32s3' into 'master'	2021-08-20 04:23:15 +00:00
CMakeLists.txt	Merge branch 'refactor/move_ldscript_to_soc' into 'master'	2021-07-23 11:54:56 +00:00
component.mk	soc: move peripheral linker scripts out of target component	2021-07-22 12:55:01 +08:00
linker.lf	soc: move implementations to esp_hw_support	2020-10-28 22:38:50 +08:00
lldesc.c	crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc	2021-05-18 11:25:41 +08:00
README.md	soc: descriptive part occupy whole component	2020-10-28 07:21:29 +08:00
soc_include_legacy_warn.c	Whitespace: Automated whitespace fixes (large commit)	2020-11-11 07:36:35 +00:00

README.md

`soc`

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware