esp-idf/components/soc
Mahavir Jain 85e1258178 Merge branch 'esp32s3/secure_boot' into 'master'
bootloader: Enable Secure boot V2 for ESP32-S3

Closes IDF-1787

See merge request espressif/esp-idf!14873
2021-08-20 06:44:19 +00:00
..
esp32 Merge branch 'refactor/pcnt_driver_esp32s3' into 'master' 2021-08-20 04:23:15 +00:00
esp32c3 Merge branch 'bugfix/uart_set_pin_use_iomux' into 'master' 2021-08-05 04:17:29 +00:00
esp32h2 Merge branch 'refactor/pcnt_driver_esp32s3' into 'master' 2021-08-20 04:23:15 +00:00
esp32s2 Merge branch 'refactor/pcnt_driver_esp32s3' into 'master' 2021-08-20 04:23:15 +00:00
esp32s3 Merge branch 'esp32s3/secure_boot' into 'master' 2021-08-20 06:44:19 +00:00
include/soc Merge branch 'refactor/pcnt_driver_esp32s3' into 'master' 2021-08-20 04:23:15 +00:00
CMakeLists.txt Merge branch 'refactor/move_ldscript_to_soc' into 'master' 2021-07-23 11:54:56 +00:00
component.mk soc: move peripheral linker scripts out of target component 2021-07-22 12:55:01 +08:00
linker.lf soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
lldesc.c crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc 2021-05-18 11:25:41 +08:00
README.md soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00
soc_include_legacy_warn.c Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware