mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
294 lines
9.3 KiB
Plaintext
294 lines
9.3 KiB
Plaintext
/*
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/* ROM function interface esp32c5.rom.phy.ld for esp32c5
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*
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*
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* Generated from ./target/esp32c5/interface-esp32c5.yml md5sum f5c146321f24f88ad1f27234da5aed11
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*
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* Compatible with ROM where ECO version equal or greater to 0.
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*
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* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
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*/
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/***************************************
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Group rom_phy
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***************************************/
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/* Functions */
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phy_param_addr = 0x400010dc;
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chip752_phyrom_version = 0x400010e0;
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chip752_phyrom_version_num = 0x400010e4;
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phy_rate_to_index = 0x400010e8;
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phy_get_target_pwr = 0x400010ec;
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phy_get_max_pwr = 0x400010f0;
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phy_get_pwr_index = 0x400010f4;
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phy_get_rc_dout = 0x400010f8;
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phy_rc_cal = 0x400010fc;
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phy_abs_temp = 0x40001100;
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phy_set_chan_interp = 0x40001104;
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phy_loop_clk_en = 0x40001108;
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phy_get_data_sat = 0x4000110c;
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phy_byte_to_word = 0x40001110;
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phy_get_rx_freq = 0x40001114;
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phy_bb_bss_cbw40 = 0x40001118;
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phy_set_chan_reg = 0x4000111c;
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phy_i2c_master_reset = 0x40001120;
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phy_chan14_mic_enable = 0x40001124;
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phy_chan14_mic_cfg = 0x40001128;
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phy_set_most_tpw = 0x4000112c;
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phy_get_most_tpw = 0x40001130;
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phy_tx_state_out = 0x40001134;
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phy_ant_dft_cfg = 0x40001138;
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phy_ant_wifitx_cfg = 0x4000113c;
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phy_ant_wifirx_cfg = 0x40001140;
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phy_ant_bttx_cfg = 0x40001144;
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phy_ant_btrx_cfg = 0x40001148;
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phy_chan_dump_cfg = 0x4000114c;
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phy_chan_dump_cfg_752 = 0x40001150;
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phy_enable_low_rate = 0x40001154;
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phy_disable_low_rate = 0x40001158;
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phy_is_low_rate_enabled = 0x4000115c;
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phy_dig_reg_backup = 0x40001160;
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phy_chan_filt_set = 0x40001164;
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phy_rx11blr_cfg = 0x40001168;
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phy_set_cca = 0x4000116c;
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phy_set_rx_sense = 0x40001170;
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phy_freq_module_resetn = 0x40001174;
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phy_freq_chan_en_sw = 0x40001178;
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phy_write_chan_freq = 0x4000117c;
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phy_get_freq_mem_param = 0x40001180;
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phy_get_freq_mem_addr = 0x40001184;
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phy_wr_freq_mem = 0x40001188;
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phy_read_rf_freq_mem = 0x4000118c;
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phy_freq_i2c_mem_write = 0x40001190;
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phy_freq_num_get_data = 0x40001194;
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phy_freq_i2c_num_addr = 0x40001198;
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phy_freq_i2c_write_set = 0x4000119c;
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phy_pll_cap_mem_update = 0x400011a0;
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phy_en_hw_set_freq = 0x400011a4;
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phy_dis_hw_set_freq = 0x400011a8;
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phy_wait_freq_set_busy = 0x400011ac;
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phy_i2c_enter_critical_ = 0x400011b0;
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phy_i2c_exit_critical_ = 0x400011b4;
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phy_i2c_clk_sel = 0x400011b8;
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phy_get_i2c_read_mask_ = 0x400011bc;
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phy_get_i2c_mst0_mask = 0x400011c0;
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phy_get_i2c_hostid_ = 0x400011c4;
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phy_chip_i2c_readReg_org = 0x400011c8;
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phy_chip_i2c_readReg = 0x400011cc;
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phy_i2c_paral_set_mst0 = 0x400011d0;
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phy_i2c_paral_set_read = 0x400011d4;
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phy_i2c_paral_read = 0x400011d8;
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phy_i2c_paral_write = 0x400011dc;
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phy_i2c_paral_write_num = 0x400011e0;
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phy_i2c_paral_write_mask = 0x400011e4;
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phy_i2c_readReg = 0x400011e8;
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phy_chip_i2c_writeReg = 0x400011ec;
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phy_i2c_writeReg = 0x400011f0;
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phy_i2c_readReg_Mask = 0x400011f4;
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phy_set_txcap_reg = 0x400011f8;
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phy_i2c_sar2_init_code = 0x400011fc;
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phy_i2c_pkdet_set = 0x40001200;
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phy_filter_dcap_set = 0x40001204;
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phy_i2c_rc_cal_set = 0x40001208;
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phy_ckgen_5g_cal = 0x4000120c;
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phy_ckgen_2g_cal = 0x40001210;
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phy_adc_rate_set = 0x40001214;
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phy_dac_rate_set = 0x40001218;
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phy_encode_i2c_master = 0x4000121c;
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phy_i2c_master_fill = 0x40001220;
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phy_band_reg = 0x40001224;
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phy_open_fe_bb_clk = 0x40001228;
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phy_get_mac_addr = 0x4000122c;
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phy_set_mac_data = 0x40001230;
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phy_rfcal_data_sub = 0x40001234;
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phy_rf_cal_data_recovery = 0x40001238;
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phy_rf_cal_data_backup = 0x4000123c;
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phy_rfcal_data_check = 0x40001240;
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phy_pbus_force_mode = 0x40001244;
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phy_pbus_rd_addr_ = 0x40001248;
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phy_pbus_force_test = 0x4000124c;
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phy_pbus_rd = 0x40001250;
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phy_pbus_debugmode = 0x40001254;
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phy_pbus_workmode = 0x40001258;
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phy_pbus_clear_reg = 0x4000125c;
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phy_pbus_set_rxgain = 0x40001260;
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phy_pbus_set_dco = 0x40001264;
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phy_set_loopback_gain = 0x40001268;
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phy_txcal_debuge_mode_ = 0x4000126c;
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phy_txcal_work_mode = 0x40001270;
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phy_write_pbus_mem = 0x40001274;
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phy_set_pbus_mem_2g = 0x40001278;
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phy_set_pbus_mem_5g = 0x4000127c;
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phy_pbus_reg_store = 0x40001280;
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phy_set_pbus_mem = 0x40001284;
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phy_get_rx_pbus_freq = 0x40001288;
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phy_set_rx_pbus_freq = 0x4000128c;
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phy_pbus_xpd_iq_path = 0x40001290;
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phy_pbus_set_rftx1_5g = 0x40001294;
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phy_pwdet_reg_init = 0x40001298;
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phy_pwdet_sar2_init = 0x4000129c;
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phy_en_pwdet = 0x400012a0;
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phy_get_sar_sig_ref = 0x400012a4;
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phy_pwdet_tone_start = 0x400012a8;
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phy_get_tone_sar_dout = 0x400012ac;
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phy_get_fm_sar_dout = 0x400012b0;
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phy_txtone_linear_pwr = 0x400012b4;
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phy_linear_to_db = 0x400012b8;
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phy_get_power_db = 0x400012bc;
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phy_meas_tone_pwr_db = 0x400012c0;
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phy_pwdet_wait_idle = 0x400012c4;
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phy_pkdet_vol_start = 0x400012c8;
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phy_read_sar_dout = 0x400012cc;
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phy_read_sar2_code = 0x400012d0;
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phy_get_sar2_vol = 0x400012d4;
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phy_get_pkdet_data = 0x400012d8;
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phy_rx_pkdet_dc_cal = 0x400012dc;
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phy_disable_agc = 0x400012e0;
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phy_enable_agc = 0x400012e4;
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phy_disable_cca = 0x400012e8;
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phy_enable_cca = 0x400012ec;
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phy_write_gain_mem = 0x400012f0;
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phy_bb_bss_cbw40_dig = 0x400012f4;
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phy_tx_paon_set = 0x400012f8;
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phy_i2cmst_reg_init = 0x400012fc;
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phy_bt_gain_offset = 0x40001300;
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phy_fe_reg_init = 0x40001304;
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phy_mac_enable_bb = 0x40001308;
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phy_bb_wdg_cfg = 0x4000130c;
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phy_fe_txrx_reset = 0x40001310;
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phy_set_rx_comp_ = 0x40001314;
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phy_agc_max_gain_set = 0x40001318;
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phy_agc_reg_init = 0x4000131c;
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phy_bb_reg_init = 0x40001320;
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phy_open_i2c_xpd = 0x40001324;
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phy_force_txrx_off = 0x40001328;
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phy_txiq_set_reg = 0x4000132c;
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phy_rxiq_set_reg = 0x40001330;
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phy_rx_gain_force = 0x40001334;
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phy_set_txclk_en = 0x40001338;
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phy_set_rxclk_en = 0x4000133c;
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phy_start_tx_tone_step = 0x40001340;
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phy_stop_tx_tone = 0x40001344;
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phy_bb_wdg_test_en = 0x40001348;
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phy_noise_floor_auto_set = 0x4000134c;
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phy_read_hw_noisefloor = 0x40001350;
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phy_iq_corr_enable = 0x40001354;
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phy_wifi_agc_sat_gain = 0x40001358;
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phy_bbpll_cal = 0x4000135c;
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phy_ant_init = 0x40001360;
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phy_wifi_fbw_sel = 0x40001364;
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phy_bt_filter_reg = 0x40001368;
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phy_rx_sense_set = 0x4000136c;
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phy_tx_state_set = 0x40001370;
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phy_close_pa = 0x40001374;
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phy_freq_correct = 0x40001378;
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phy_set_pbus_reg = 0x4000137c;
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phy_wifi_rifs_mode_en = 0x40001380;
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phy_rfagc_disable = 0x40001384;
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phy_pkdadc_set = 0x40001388;
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phy_nrx_freq_set = 0x4000138c;
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phy_fe_adc_on = 0x40001390;
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phy_force_pwr_index = 0x40001394;
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phy_fft_scale_force = 0x40001398;
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phy_force_rx_gain = 0x4000139c;
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phy_wifi_enable_set = 0x400013a0;
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phy_bb_cbw_chan_cfg = 0x400013a4;
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phy_vht_support = 0x400013a8;
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phy_csidump_force_lltf_cfg = 0x400013ac;
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phy_hemu_ru26_good_res = 0x400013b0;
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phy_bb_cfo_cfg = 0x400013b4;
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phy_freq_band_reg_set = 0x400013b8;
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phy_set_bb_wdg = 0x400013bc;
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phy_sifs_reg_init = 0x400013c0;
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phy_bbtx_outfilter = 0x400013c4;
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phy_bb_wdt_rst_enable = 0x400013c8;
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phy_bb_wdt_int_enable = 0x400013cc;
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phy_bb_wdt_timeout_clear = 0x400013d0;
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phy_bb_wdt_get_status = 0x400013d4;
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phy_freq_to_chan = 0x400013d8;
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phy_chan_to_freq = 0x400013dc;
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phy_freq_to_index = 0x400013e0;
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phy_iq_est_enable = 0x400013e4;
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phy_iq_est_disable = 0x400013e8;
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phy_dc_iq_est = 0x400013ec;
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phy_set_cal_rxdc = 0x400013f0;
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phy_rxiq_get_mis = 0x400013f4;
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phy_rxiq_cover_mg_mp = 0x400013f8;
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phy_rfcal_rxiq = 0x400013fc;
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phy_get_rfcal_rxiq_data = 0x40001400;
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phy_get_dco_comp = 0x40001404;
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phy_pbus_rx_dco_cal = 0x40001408;
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phy_rxdc_est_min = 0x4000140c;
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phy_rx_dco_cal_1step = 0x40001410;
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phy_set_lb_txiq = 0x40001414;
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phy_rxiq_opt = 0x40001418;
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phy_set_rx_gain_cal_iq = 0x4000141c;
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phy_set_rx_gain_cal_dc = 0x40001420;
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phy_spur_reg_write = 0x40001424;
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phy_spur_cal = 0x40001428;
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phy_spur_coef_cfg = 0x4000142c;
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phy_bb_gain_index = 0x40001430;
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phy_rfrx_gain_index = 0x40001434;
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phy_gen_rx_gain_table = 0x40001438;
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phy_get_rxbb_dc = 0x4000143c;
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phy_wr_rx_gain_mem = 0x40001440;
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phy_set_tsens_power_ = 0x40001444;
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phy_get_tsens_value_ = 0x40001448;
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phy_tsens_read_init = 0x4000144c;
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phy_code_to_temp = 0x40001450;
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phy_tsens_dac_to_index = 0x40001454;
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phy_tsens_dac_cal = 0x40001458;
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phy_tsens_code_read = 0x4000145c;
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phy_tsens_temp_read = 0x40001460;
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phy_tsens_temp_read_local = 0x40001464;
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phy_temp_to_power_ = 0x40001468;
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phy_bt_txdc_cal = 0x4000146c;
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phy_bt_txiq_cal = 0x40001470;
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phy_txdc_cal = 0x40001474;
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phy_txdc_cal_pwdet = 0x40001478;
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phy_txiq_get_mis_pwr = 0x4000147c;
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phy_txiq_cover = 0x40001480;
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phy_rfcal_txiq = 0x40001484;
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phy_get_power_atten = 0x40001488;
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phy_pwdet_ref_code = 0x4000148c;
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phy_pwdet_code_cal = 0x40001490;
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phy_rfcal_txcap = 0x40001494;
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phy_txcap_setting = 0x40001498;
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phy_get_cal_chan = 0x4000149c;
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phy_get_chan_cal_index = 0x400014a0;
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phy_get_chan_cap = 0x400014a4;
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phy_freq_to_mbgain = 0x400014a8;
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phy_rfcal_pwrctrl = 0x400014ac;
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phy_get_pwdet_offset_ = 0x400014b0;
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phy_tx_pwctrl_init_cal = 0x400014b4;
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phy_tx_pwctrl_init = 0x400014b8;
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phy_bt_tx_pwctrl_init = 0x400014bc;
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phy_txbbgain_to_index = 0x400014c0;
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phy_index_to_txbbgain = 0x400014c4;
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phy_bt_get_tx_gain = 0x400014c8;
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phy_dig_gain_check = 0x400014cc;
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phy_wifi_get_tx_gain = 0x400014d0;
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phy_wifi_11g_rate_chg = 0x400014d4;
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phy_bt_chan_pwr_interp = 0x400014d8;
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phy_set_tx_gain_mem = 0x400014dc;
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phy_get_rate_fcc_index = 0x400014e0;
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phy_get_chan_target_power = 0x400014e4;
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phy_get_tx_gain_value = 0x400014e8;
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phy_wifi_get_target_power = 0x400014ec;
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phy_wifi_get_tx_tab_ = 0x400014f0;
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phy_wifi_set_tx_gain = 0x400014f4;
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phy_bt_get_tx_tab_ = 0x400014f8;
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phy_bt_set_tx_gain = 0x400014fc;
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phy_bt_tx_gain_init = 0x40001500;
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phy_pbus_xpd_rx_off = 0x40002518;
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phy_i2c_writeReg_Mask = 0x4000787e;
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phy_pbus_xpd_rx_on = 0x40002628;
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phy_pbus_xpd_tx_on = 0x4000274c;
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/* Data (.data, .bss, .rodata) */
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phy_rom_phyFuns = 0x4085fb80;
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phy_param_rom = 0x4085fc70;
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