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esp-idf/components/esp32s3
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Angus Gratton 82ffb33085 Merge branch 'feature/crypto_reserve_gdma_ch_v4.3' into 'release/v4.3' 
aes/sha: use a shared lazy allocated GDMA channel for AES and SHA (v4.3)

See merge request espressif/esp-idf!12676
2021-03-11 10:50:09 +00:00
..
include
aes/sha: use a shared lazy allocated GDMA channel for AES and SHA
2021-03-10 09:40:35 +08:00
ld
driver: esp32s3 fix UART driver
2021-03-10 13:41:10 +08:00
cache_err_int.c
esp32s3: clk, memory layout
2020-07-27 13:05:22 +08:00
clk.c
Whitespace: Automated whitespace fixes (large commit)
2020-11-11 07:36:35 +00:00
CMakeLists.txt
Updates for riscv support
2020-11-13 07:49:11 +11:00
component.mk
esp32s3: initial empty component
2020-07-20 10:51:05 +08:00
crosscore_int.c
esp32s3: clk, memory layout
2020-07-27 13:05:22 +08:00
dport_access.c
esp32s3: clk, memory layout
2020-07-27 13:05:22 +08:00
esp_crypto_lock.c
aes/sha: use a shared lazy allocated GDMA channel for AES and SHA
2021-03-10 09:40:35 +08:00
hw_random.c
global: Uses CCOUNT API instead of XTHAL macro
2021-01-12 16:24:23 +08:00
Kconfig
esp_system: make rtc fast memory to heap configuration unified across chips
2020-12-24 09:46:35 +05:30
linker.lf
esp32s3: clk, memory layout
2020-07-27 13:05:22 +08:00
Makefile.projbuild
esp32s3: initial empty component
2020-07-20 10:51:05 +08:00
memprot.c
esp32s3: sync memprot header from esp32s2, fixing compilation error
2020-10-08 22:20:39 +02:00
README.md
esp32s3: initial empty component
2020-07-20 10:51:05 +08:00
spiram_psram.c
global: fix sign-compare warnings
2021-01-12 14:05:08 +08:00
spiram_psram.h
psram: support psram for esp32s3
2020-09-22 15:15:03 +08:00
spiram.c
support flash instr and rodata copy to SPIRAM
2020-09-22 15:15:03 +08:00
system_api_esp32s3.c
fix ble restart faild when enable ble sleep
2021-01-27 14:45:03 +08:00

README.md

ESP32-S3 component

This directory contains support for the upcoming ESP32-S3 SoC. This code is still work in progress and not intended for public use.

Please follow announcements on espressif.com and esp32.com to be informed about the ESP32-S3 SoC.

This note will be removed once the ESP32-S3 initial support is ready.