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History

Jiang Jiang Jian 3908360e46 Merge branch 'feature/support_bss_in_psram_for_esp32s2_v4.3' into 'release/v4.3'

[system] Allow .bss segment placed in external memory for ESP32-S2 ( backport v4.3)

See merge request espressif/esp-idf!14946

2021-09-15 08:09:42 +00:00

include

aes/sha: use a shared lazy allocated GDMA channel for AES and SHA

2021-03-10 09:40:35 +08:00

Tools: Fix memory calculations of idf_size.py

2021-09-01 16:36:48 +02:00

cache_err_int.c

esp32s3: clk, memory layout

2020-07-27 13:05:22 +08:00

clk.c

Whitespace: Automated whitespace fixes (large commit)

2020-11-11 07:36:35 +00:00

CMakeLists.txt

build: fix linker scripts edition not triggering a rebuild

2021-05-06 12:19:01 +08:00

component.mk

esp32s3: initial empty component

2020-07-20 10:51:05 +08:00

crosscore_int.c

esp32s3: clk, memory layout

2020-07-27 13:05:22 +08:00

dport_access.c

esp32s3: clk, memory layout

2020-07-27 13:05:22 +08:00

esp_crypto_lock.c

aes/sha: use a shared lazy allocated GDMA channel for AES and SHA

2021-03-10 09:40:35 +08:00

hw_random.c

global: Uses CCOUNT API instead of XTHAL macro

2021-01-12 16:24:23 +08:00

Kconfig

ULP: reduce max possible memory reserved for ULP coprocessor

2021-07-31 14:10:57 +08:00

linker.lf

esp32s3: clk, memory layout

2020-07-27 13:05:22 +08:00

Makefile.projbuild

esp32s3: initial empty component

2020-07-20 10:51:05 +08:00

memprot.c

esp32s3: sync memprot header from esp32s2, fixing compilation error

2020-10-08 22:20:39 +02:00

README.md

esp32s3: initial empty component

2020-07-20 10:51:05 +08:00

spiram_psram.c

gpio: Disable USB JTAG when setting pins 18 and 19 as GPIOs on ESP32C3

2021-04-12 17:45:06 +08:00

spiram_psram.h

psram: support psram for esp32s3

2020-09-22 15:15:03 +08:00

spiram.c

Adjust the variable name &

2021-09-15 16:09:33 +08:00

system_api_esp32s3.c

fix ble restart faild when enable ble sleep

2021-01-27 14:45:03 +08:00

README.md

ESP32-S3 component

This directory contains support for the upcoming ESP32-S3 SoC. This code is still work in progress and not intended for public use.

Please follow announcements on espressif.com and esp32.com to be informed about the ESP32-S3 SoC.

This note will be removed once the ESP32-S3 initial support is ready.