esp-idf/components/riscv
Jakob Hasse 48ab527148 cxx/esp_hw_support: added build test, changed parameter types
Changed rv_utils_intr_edge_ack and esp_cpu_intr_edge_ack to
take uint32_t instead of int to avoid build errors.

The test is to test in particular that __builtin_ffsll, used in
xt_utils.h, which is included via esp_cpu.h, compiles fine
in C++20 with -Wsign-conversion enabled.

Closes https://github.com/espressif/esp-idf/pull/10895
2023-05-11 11:16:45 +08:00
..
include cxx/esp_hw_support: added build test, changed parameter types 2023-05-11 11:16:45 +08:00
CMakeLists.txt G0: RISC-V targets have now an independent G0 layer 2022-06-14 15:00:53 +08:00
instruction_decode.c interrupt: filter out reserved int number by decoding risc-v JAL instruction 2021-01-05 15:39:46 +08:00
interrupt.c riscv: Remove redundant riscv_interrupts.h header 2022-09-16 16:45:43 +08:00
linker.lf riscv: moved some interrupt functions from IRAM to flash 2023-04-24 10:27:31 +08:00
project_include.cmake build: Adds support for universal Clang toolchain 2022-11-23 13:25:16 +03:00
vectors.S riscv: Use 'li' instead of 'la' for loading peripheral reg address 2022-12-06 21:54:50 +03:00