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riscv: Use 'li' instead of 'la' for loading peripheral reg address

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Alexey Gerenkov 2022-11-22 23:17:03 +03:00 committed by Andrei Safronov
parent 2710749f21
commit 002411b169
1 changed files with 3 additions and 3 deletions
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6
components/riscv/vectors.S
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@ -238,14 +238,14 @@ _interrupt_handler:
csrr s2, mstatus
/* Save the interrupt threshold level */
la t0, INTERRUPT_CORE0_CPU_INT_THRESH_REG
li t0, INTERRUPT_CORE0_CPU_INT_THRESH_REG
lw s3, 0(t0)
/* Increase interrupt threshold level */
li t2, 0x7fffffff
and t1, s1, t2 /* t1 = mcause & mask */
slli t1, t1, 2 /* t1 = mcause * 4 */
la t2, INTC_INT_PRIO_REG(0)
li t2, INTC_INT_PRIO_REG(0)
add t1, t2, t1 /* t1 = INTC_INT_PRIO_REG + 4 * mcause */
lw t2, 0(t1) /* t2 = INTC_INT_PRIO_REG[mcause] */
addi t2, t2, 1 /* t2 = t2 +1 */
@ -287,7 +287,7 @@ _interrupt_handler:
/* MIE cleared. Nested interrupts are disabled */
/* restore the interrupt threshold level */
la t0, INTERRUPT_CORE0_CPU_INT_THRESH_REG
li t0, INTERRUPT_CORE0_CPU_INT_THRESH_REG
sw s3, 0(t0)
fence