mirror of
https://github.com/espressif/esp-idf.git
synced 2024-10-05 20:47:46 -04:00
32756b165e
Goal is that multiple faults would be required to bypass a boot-time signature check. - Also strengthens some address range checks for safe app memory addresses - Change pre-enable logic to also check the bootloader signature before enabling SBV2 on ESP32 Add some additional checks for invalid sections: - Sections only partially in DRAM or IRAM are invalid - If a section is in D/IRAM, allow the possibility only some is in D/IRAM - Only pass sections that are entirely in the same type of RTC memory region |
||
---|---|---|
.. | ||
include | ||
adc_periph.c | ||
component.mk | ||
cpu_util.c | ||
dac_periph.c | ||
gpio_periph.c | ||
i2c_apll.h | ||
i2c_bbpll.h | ||
i2c_periph.c | ||
i2c_rtc_clk.h | ||
i2s_periph.c | ||
interrupts.c | ||
ledc_periph.c | ||
rtc_clk.c | ||
rtc_init.c | ||
rtc_io_periph.c | ||
rtc_periph.c | ||
rtc_pm.c | ||
rtc_sleep.c | ||
rtc_time.c | ||
rtc_wdt.c | ||
soc_log.h | ||
soc_memory_layout.c | ||
sources.cmake | ||
spi_periph.c | ||
touch_sensor_hal.c | ||
touch_sensor_periph.c | ||
uart_periph.c |