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91 lines
2.5 KiB
C
91 lines
2.5 KiB
C
/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* ESP custom semihosting calls numbers */
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/**
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* @brief Initialize apptrace data at host side
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*
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* @param addr address of apptrace control data block
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* @return return 0 on sucess or non-zero error code
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*/
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#define ESP_SEMIHOSTING_SYS_APPTRACE_INIT 0x101
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/**
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* @brief Initialize debug stubs table at host side
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*
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* @param addr address of debug stubs table
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* @return return 0 on sucess or non-zero error code
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*/
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#define ESP_SEMIHOSTING_SYS_DBG_STUBS_INIT 0x102
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/**
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* @brief Set/clear breakpoint
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*
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* @param set if true set breakpoint, otherwise clear it
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* @param id breakpoint ID
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* @param addr address to set breakpoint at. Ignored if `set` is false.
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* @return return 0 on sucess or non-zero error code
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*/
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#define ESP_SEMIHOSTING_SYS_BREAKPOINT_SET 0x103
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/**
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* @brief Set/clear watchpoint
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*
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* @param set if true set watchpoint, otherwise clear it
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* @param id watchpoint ID
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* @param addr address to set watchpoint at. Ignored if `set` is false.
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* @param size size of watchpoint. Ignored if `set` is false.
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* @param flags watchpoint flags, see description below. Ignored if `set` is false.
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* @return return 0 on sucess or non-zero error code
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*/
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#define ESP_SEMIHOSTING_SYS_WATCHPOINT_SET 0x104
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/* bit values for `flags` argument of ESP_SEMIHOSTING_SYS_WATCHPOINT_SET call. Can be ORed. */
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/* watch for 'reads' at `addr` */
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#define ESP_SEMIHOSTING_WP_FLG_RD (1UL << 0)
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/* watch for 'writes' at `addr` */
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#define ESP_SEMIHOSTING_WP_FLG_WR (1UL << 1)
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/**
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* @brief Perform semihosting call
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*
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* See https://github.com/riscv/riscv-semihosting-spec/ and the linked
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* ARM semihosting spec for details.
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*
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* @param id semihosting call number
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* @param data data block to pass to the host; number of items and their
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* meaning depends on the semihosting call. See the spec for
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* details.
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*
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* @return return value from the host
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*/
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static inline long semihosting_call_noerrno(long id, long *data)
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{
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register long a0 asm ("a0") = id;
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register long a1 asm ("a1") = (long) data;
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__asm__ __volatile__ (
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".option push\n"
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".option norvc\n"
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"slli zero, zero, 0x1f\n"
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"ebreak\n"
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"srai zero, zero, 0x7\n"
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".option pop\n"
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: "+r"(a0) : "r"(a1) : "memory");
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return a0;
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}
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#ifdef __cplusplus
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}
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#endif
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