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https://github.com/espressif/esp-idf.git
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126 lines
3.6 KiB
C
126 lines
3.6 KiB
C
#include <stdio.h>
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#include "unity.h"
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#include "rom/ets_sys.h"
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#include "rom/uart.h"
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#include "soc/rtc.h"
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#include "soc/rtc_cntl_reg.h"
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#include "soc/rtc_io_reg.h"
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#include "soc/sens_reg.h"
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#include "soc/io_mux_reg.h"
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#include "driver/rtc_io.h"
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#include "test_utils.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#define CALIBRATE_ONE(cali_clk) calibrate_one(cali_clk, #cali_clk)
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static uint32_t calibrate_one(rtc_cal_sel_t cal_clk, const char* name)
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{
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const uint32_t cal_count = 1000;
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const float factor = (1 << 19) * 1000.0f;
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uint32_t cali_val;
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printf("%s:\n", name);
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for (int i = 0; i < 5; ++i) {
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printf("calibrate (%d): ", i);
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cali_val = rtc_clk_cal(cal_clk, cal_count);
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printf("%.3f kHz\n", factor / (float) cali_val);
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}
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return cali_val;
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}
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TEST_CASE("RTC_SLOW_CLK sources calibration", "[rtc_clk]")
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{
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rtc_clk_32k_enable(true);
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rtc_clk_8m_enable(true, true);
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CALIBRATE_ONE(RTC_CAL_RTC_MUX);
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CALIBRATE_ONE(RTC_CAL_8MD256);
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uint32_t cal_32k = CALIBRATE_ONE(RTC_CAL_32K_XTAL);
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if (cal_32k == 0) {
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printf("32K XTAL OSC has not started up");
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} else {
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printf("switching to RTC_SLOW_FREQ_32K_XTAL: ");
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rtc_clk_slow_freq_set(RTC_SLOW_FREQ_32K_XTAL);
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printf("done\n");
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CALIBRATE_ONE(RTC_CAL_RTC_MUX);
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CALIBRATE_ONE(RTC_CAL_8MD256);
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CALIBRATE_ONE(RTC_CAL_32K_XTAL);
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}
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printf("switching to RTC_SLOW_FREQ_8MD256: ");
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rtc_clk_slow_freq_set(RTC_SLOW_FREQ_8MD256);
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printf("done\n");
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CALIBRATE_ONE(RTC_CAL_RTC_MUX);
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CALIBRATE_ONE(RTC_CAL_8MD256);
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CALIBRATE_ONE(RTC_CAL_32K_XTAL);
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}
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/* The following two are not unit tests, but are added here to make it easy to
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* check the frequency of 150k/32k oscillators. The following two "tests" will
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* output either 32k or 150k clock to GPIO25.
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*/
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static void pull_out_clk(int sel)
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{
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REG_SET_BIT(RTC_IO_PAD_DAC1_REG, RTC_IO_PDAC1_MUX_SEL_M);
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REG_CLR_BIT(RTC_IO_PAD_DAC1_REG, RTC_IO_PDAC1_RDE_M | RTC_IO_PDAC1_RUE_M);
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REG_SET_FIELD(RTC_IO_PAD_DAC1_REG, RTC_IO_PDAC1_FUN_SEL, 1);
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REG_SET_FIELD(SENS_SAR_DAC_CTRL1_REG, SENS_DEBUG_BIT_SEL, 0);
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REG_SET_FIELD(RTC_IO_RTC_DEBUG_SEL_REG, RTC_IO_DEBUG_SEL0, sel);
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}
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TEST_CASE("Output 150k clock to GPIO25", "[rtc_clk][ignore]")
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{
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pull_out_clk(RTC_IO_DEBUG_SEL0_150K_OSC);
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}
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TEST_CASE("Output 32k XTAL clock to GPIO25", "[rtc_clk][ignore]")
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{
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rtc_clk_32k_enable(true);
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pull_out_clk(RTC_IO_DEBUG_SEL0_32K_XTAL);
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}
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TEST_CASE("Output 8M XTAL clock to GPIO25", "[rtc_clk][ignore]")
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{
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rtc_clk_8m_enable(true, true);
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SET_PERI_REG_MASK(RTC_IO_RTC_DEBUG_SEL_REG, RTC_IO_DEBUG_12M_NO_GATING);
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pull_out_clk(RTC_IO_DEBUG_SEL0_8M);
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}
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static void test_clock_switching(void (*switch_func)(rtc_cpu_freq_t))
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{
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uart_tx_wait_idle(CONFIG_CONSOLE_UART_NUM);
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const int test_duration_sec = 10;
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ref_clock_init();
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uint64_t t_start = ref_clock_get();
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rtc_cpu_freq_t cur_freq = rtc_clk_cpu_freq_get();
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int count = 0;
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while (ref_clock_get() - t_start < test_duration_sec * 1000000) {
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switch_func(RTC_CPU_FREQ_XTAL);
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switch_func(cur_freq);
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++count;
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}
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uint64_t t_end = ref_clock_get();
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printf("Switch count: %d. Average time to switch PLL -> XTAL -> PLL: %d us\n", count, (int) ((t_end - t_start) / count));
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ref_clock_deinit();
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}
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TEST_CASE("Test switching between PLL and XTAL", "[rtc_clk]")
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{
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test_clock_switching(rtc_clk_cpu_freq_set);
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}
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TEST_CASE("Test fast switching between PLL and XTAL", "[rtc_clk]")
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{
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test_clock_switching(rtc_clk_cpu_freq_set_fast);
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}
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