esp-idf/examples/system/ulp_riscv/gpio/example_test.py
Marius Vikhammer 3c358dd074 ulp: only enable relevant wakeup sources for ULP
Do not enable co-processor trap wakeup source when running ULP FSM, as this
could cause spurious wake-ups.
2022-06-29 11:57:05 +08:00

49 lines
1.5 KiB
Python

from __future__ import unicode_literals
import re
import time
import tiny_test_fw
import ttfw_idf
from tiny_test_fw import DUT
@ttfw_idf.idf_example_test(env_tag='Example_GENERIC', target=['esp32s2', 'esp32s3'])
def test_examples_ulp_riscv(env, extra_data): # type: (tiny_test_fw.Env.Env, None) -> None # pylint: disable=unused-argument
dut = env.get_dut('ulp_riscv', 'examples/system/ulp_riscv/gpio')
dut.start_app()
dut.expect_all('Not a ULP-RISC-V wakeup, initializing it!',
'Entering in deep sleep',
timeout=30)
# Give the chip time to enter deepsleep
time.sleep(1)
# Run two times to make sure device sleep
# and wake up properly
for i in range(0, 2):
# Set GPIO0 using DTR
dut.port_inst.setDTR(i % 2 == 0)
dut.expect('ULP-RISC-V woke up the main CPU!', timeout=5)
# Check GPIO state
state = 'Low' if i % 2 == 0 else 'High'
dut.expect(re.compile(r'ULP-RISC-V read changes in GPIO_0 current is: %s' % state), timeout=5)
# Go back to sleep
dut.expect('Entering in deep sleep', timeout=5)
try:
# We expect a timeout here, otherwise it means that
# the main CPU woke up unexpectedly!
dut.expect('ULP-RISC-V woke up the main CPU!', timeout=20)
raise Exception('Main CPU woke up unexpectedly!')
except DUT.ExpectTimeout:
pass
if __name__ == '__main__':
test_examples_ulp_riscv()