mirror of
https://github.com/espressif/esp-idf.git
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339 lines
8.3 KiB
C
339 lines
8.3 KiB
C
/**
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** Group: Configuration Register */
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/** Type of regdma_conf register
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* Peri backup control register
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*/
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typedef union {
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struct {
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/** flow_err : RO; bitpos: [2:0]; default: 0;
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* backup error type
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*/
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uint32_t flow_err:3;
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/** start : WT; bitpos: [3]; default: 0;
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* backup start signal
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*/
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uint32_t start:1;
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/** to_mem : R/W; bitpos: [4]; default: 0;
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* backup direction(reg to mem / mem to reg)
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*/
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uint32_t to_mem:1;
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/** link_sel : R/W; bitpos: [6:5]; default: 0;
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* Link select
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*/
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uint32_t link_sel:2;
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/** start_mac : WT; bitpos: [7]; default: 0;
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* mac sw backup start signal
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*/
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uint32_t start_mac:1;
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/** to_mem_mac : R/W; bitpos: [8]; default: 0;
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* mac sw backup direction(reg to mem / mem to reg)
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*/
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uint32_t to_mem_mac:1;
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/** sel_mac : R/W; bitpos: [9]; default: 0;
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* mac hw/sw select
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*/
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uint32_t sel_mac:1;
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uint32_t reserved_10:22;
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};
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uint32_t val;
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} pau_regdma_conf_reg_t;
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/** Type of regdma_clk_conf register
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* Clock control register
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*/
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typedef union {
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struct {
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/** clk_en : R/W; bitpos: [0]; default: 0;
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* clock enable
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*/
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uint32_t clk_en:1;
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uint32_t reserved_1:31;
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};
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uint32_t val;
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} pau_regdma_clk_conf_reg_t;
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/** Type of regdma_etm_ctrl register
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* ETM start ctrl reg
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*/
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typedef union {
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struct {
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/** etm_start_0 : WT; bitpos: [0]; default: 0;
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* etm_start_0 reg
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*/
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uint32_t etm_start_0:1;
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/** etm_start_1 : WT; bitpos: [1]; default: 0;
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* etm_start_1 reg
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*/
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uint32_t etm_start_1:1;
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/** etm_start_2 : WT; bitpos: [2]; default: 0;
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* etm_start_2 reg
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*/
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uint32_t etm_start_2:1;
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/** etm_start_3 : WT; bitpos: [3]; default: 0;
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* etm_start_3 reg
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*/
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uint32_t etm_start_3:1;
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uint32_t reserved_4:28;
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};
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uint32_t val;
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} pau_regdma_etm_ctrl_reg_t;
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/** Type of regdma_link_0_addr register
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* link_0_addr
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*/
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typedef union {
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struct {
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/** link_addr_0 : R/W; bitpos: [31:0]; default: 0;
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* link_0_addr reg
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*/
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uint32_t link_addr_0:32;
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};
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uint32_t val;
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} pau_regdma_link_0_addr_reg_t;
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/** Type of regdma_link_1_addr register
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* Link_1_addr
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*/
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typedef union {
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struct {
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/** link_addr_1 : R/W; bitpos: [31:0]; default: 0;
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* Link_1_addr reg
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*/
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uint32_t link_addr_1:32;
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};
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uint32_t val;
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} pau_regdma_link_1_addr_reg_t;
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/** Type of regdma_link_2_addr register
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* Link_2_addr
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*/
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typedef union {
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struct {
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/** link_addr_2 : R/W; bitpos: [31:0]; default: 0;
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* Link_2_addr reg
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*/
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uint32_t link_addr_2:32;
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};
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uint32_t val;
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} pau_regdma_link_2_addr_reg_t;
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/** Type of regdma_link_3_addr register
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* Link_3_addr
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*/
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typedef union {
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struct {
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/** link_addr_3 : R/W; bitpos: [31:0]; default: 0;
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* Link_3_addr reg
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*/
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uint32_t link_addr_3:32;
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};
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uint32_t val;
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} pau_regdma_link_3_addr_reg_t;
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/** Type of regdma_link_mac_addr register
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* Link_mac_addr
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*/
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typedef union {
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struct {
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/** link_addr_mac : R/W; bitpos: [31:0]; default: 0;
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* Link_mac_addr reg
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*/
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uint32_t link_addr_mac:32;
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};
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uint32_t val;
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} pau_regdma_link_mac_addr_reg_t;
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/** Type of regdma_current_link_addr register
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* current link addr
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*/
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typedef union {
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struct {
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/** current_link_addr : RO; bitpos: [31:0]; default: 0;
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* current link addr reg
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*/
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uint32_t current_link_addr:32;
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};
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uint32_t val;
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} pau_regdma_current_link_addr_reg_t;
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/** Type of regdma_backup_addr register
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* Backup addr
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*/
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typedef union {
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struct {
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/** backup_addr : RO; bitpos: [31:0]; default: 0;
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* backup addr reg
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*/
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uint32_t backup_addr:32;
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};
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uint32_t val;
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} pau_regdma_backup_addr_reg_t;
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/** Type of regdma_mem_addr register
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* mem addr
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*/
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typedef union {
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struct {
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/** mem_addr : RO; bitpos: [31:0]; default: 0;
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* mem addr reg
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*/
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uint32_t mem_addr:32;
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};
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uint32_t val;
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} pau_regdma_mem_addr_reg_t;
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/** Type of regdma_bkp_conf register
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* backup config
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*/
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typedef union {
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struct {
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/** read_interval : R/W; bitpos: [6:0]; default: 32;
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* Link read_interval
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*/
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uint32_t read_interval:7;
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/** link_tout_thres : R/W; bitpos: [16:7]; default: 50;
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* link wait timeout threshold
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*/
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uint32_t link_tout_thres:10;
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/** burst_limit : R/W; bitpos: [21:17]; default: 8;
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* burst limit
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*/
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uint32_t burst_limit:5;
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/** backup_tout_thres : R/W; bitpos: [31:22]; default: 500;
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* Backup timeout threshold
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*/
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uint32_t backup_tout_thres:10;
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};
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uint32_t val;
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} pau_regdma_bkp_conf_reg_t;
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/** Type of int_ena register
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* Read only register for error and done
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*/
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typedef union {
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struct {
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/** done_int_ena : R/W; bitpos: [0]; default: 0;
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* backup done flag
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*/
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uint32_t done_int_ena:1;
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/** error_int_ena : R/W; bitpos: [1]; default: 0;
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* error flag
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*/
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uint32_t error_int_ena:1;
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uint32_t reserved_2:30;
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};
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uint32_t val;
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} pau_int_ena_reg_t;
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/** Type of int_raw register
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* Read only register for error and done
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*/
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typedef union {
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struct {
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/** done_int_raw : R/WTC/SS; bitpos: [0]; default: 0;
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* backup done flag
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*/
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uint32_t done_int_raw:1;
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/** error_int_raw : R/WTC/SS; bitpos: [1]; default: 0;
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* error flag
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*/
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uint32_t error_int_raw:1;
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uint32_t reserved_2:30;
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};
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uint32_t val;
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} pau_int_raw_reg_t;
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/** Type of int_clr register
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* Read only register for error and done
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*/
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typedef union {
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struct {
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/** done_int_clr : WT; bitpos: [0]; default: 0;
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* backup done flag
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*/
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uint32_t done_int_clr:1;
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/** error_int_clr : WT; bitpos: [1]; default: 0;
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* error flag
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*/
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uint32_t error_int_clr:1;
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uint32_t reserved_2:30;
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};
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uint32_t val;
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} pau_int_clr_reg_t;
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/** Type of int_st register
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* Read only register for error and done
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*/
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typedef union {
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struct {
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/** done_int_st : RO; bitpos: [0]; default: 0;
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* backup done flag
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*/
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uint32_t done_int_st:1;
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/** error_int_st : RO; bitpos: [1]; default: 0;
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* error flag
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*/
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uint32_t error_int_st:1;
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uint32_t reserved_2:30;
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};
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uint32_t val;
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} pau_int_st_reg_t;
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/** Group: Version Register */
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/** Type of date register
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* Date register.
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*/
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typedef union {
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struct {
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/** date : R/W; bitpos: [27:0]; default: 35663984;
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* REGDMA date information/ REGDMA version information.
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*/
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uint32_t date:28;
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uint32_t reserved_28:4;
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};
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uint32_t val;
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} pau_date_reg_t;
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typedef struct {
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volatile pau_regdma_conf_reg_t regdma_conf;
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volatile pau_regdma_clk_conf_reg_t regdma_clk_conf;
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volatile pau_regdma_etm_ctrl_reg_t regdma_etm_ctrl;
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volatile pau_regdma_link_0_addr_reg_t regdma_link_0_addr;
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volatile pau_regdma_link_1_addr_reg_t regdma_link_1_addr;
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volatile pau_regdma_link_2_addr_reg_t regdma_link_2_addr;
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volatile pau_regdma_link_3_addr_reg_t regdma_link_3_addr;
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volatile pau_regdma_link_mac_addr_reg_t regdma_link_mac_addr;
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volatile pau_regdma_current_link_addr_reg_t regdma_current_link_addr;
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volatile pau_regdma_backup_addr_reg_t regdma_backup_addr;
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volatile pau_regdma_mem_addr_reg_t regdma_mem_addr;
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volatile pau_regdma_bkp_conf_reg_t regdma_bkp_conf;
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volatile pau_int_ena_reg_t int_ena;
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volatile pau_int_raw_reg_t int_raw;
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volatile pau_int_clr_reg_t int_clr;
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volatile pau_int_st_reg_t int_st;
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uint32_t reserved_040[239];
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volatile pau_date_reg_t date;
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} pau_dev_t;
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#ifndef __cplusplus
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_Static_assert(sizeof(pau_dev_t) == 0x400, "Invalid size of pau_dev_t structure");
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#endif
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#ifdef __cplusplus
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}
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#endif
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