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https://github.com/espressif/esp-idf.git
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4df3ff619e
- add hardware stack guard based on assist-debug module - enable hardware stack guard by default - disable hardware stack guard for freertos ci.release test - refactor rtos_int_enter/rtos_int_exit to change SP register inside them - fix panic_reason.h header for RISC-V - update docs to include information about the new feature
soc
The soc
component provides hardware description for targets supported by ESP-IDF.
- `xxx_reg.h` - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h` - features/capabilities of the hardware
- `xxx_pins.h` - pin definitions
- `xxx_periph.h/*.c` - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware