esp-idf/components/soc
Sudeep Mohanty 6dcb5bd1d3 rtci2c: Corrected the register base addr reference for RTC I2C on esp32s3
This commit corrects the register base address reference for RTC I2C on
esp32s3.
2022-08-15 14:50:14 +02:00
..
esp32 Merge branch 'bugfix/multiple_adc_bugfix_v4.4' into 'release/v4.4' 2022-08-04 14:42:53 +08:00
esp32c3 Clean IRAM and DRAM address space conversion macros 2022-08-09 20:33:26 +08:00
esp32h2 Clean IRAM and DRAM address space conversion macros 2022-08-09 20:33:26 +08:00
esp32s2 Clean IRAM and DRAM address space conversion macros 2022-08-09 20:33:26 +08:00
esp32s3 rtci2c: Corrected the register base addr reference for RTC I2C on esp32s3 2022-08-15 14:50:14 +02:00
include/soc lcd: unify callback prototype 2021-10-02 14:23:31 +08:00
CMakeLists.txt Merge branch 'refactor/move_ldscript_to_soc' into 'master' 2021-07-23 11:54:56 +00:00
component.mk soc: move peripheral linker scripts out of target component 2021-07-22 12:55:01 +08:00
linker.lf soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
lldesc.c crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc 2021-05-18 11:25:41 +08:00
README.md soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00
soc_include_legacy_warn.c Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware