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120 lines
3.4 KiB
C
120 lines
3.4 KiB
C
/*
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* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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// Note that most of the register operations in this layer are non-atomic operations.
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#pragma once
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#include <stdbool.h>
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#include "hal/assert.h"
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#include "hal/misc.h"
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#include "soc/gpio_ext_struct.h"
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#include "soc/soc_etm_source.h"
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#define GPIO_LL_ETM_EVENT_ID_POS_EDGE(ch) (GPIO_EVT_CH0_RISE_EDGE + (ch))
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#define GPIO_LL_ETM_EVENT_ID_NEG_EDGE(ch) (GPIO_EVT_CH0_FALL_EDGE + (ch))
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#define GPIO_LL_ETM_EVENT_ID_ANY_EDGE(ch) (GPIO_EVT_CH0_ANY_EDGE + (ch))
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#define GPIO_LL_ETM_TASK_ID_SET(ch) (GPIO_TASK_CH0_SET + (ch))
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#define GPIO_LL_ETM_TASK_ID_CLR(ch) (GPIO_TASK_CH0_CLEAR + (ch))
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#define GPIO_LL_ETM_TASK_ID_TOG(ch) (GPIO_TASK_CH0_TOGGLE + (ch))
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Set which GPIO to be bounded to the event channel
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*
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* @param dev Register base address
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* @param chan Channel number
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* @param gpio_num GPIO number
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*/
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static inline void gpio_ll_etm_event_channel_set_gpio(gpio_etm_dev_t *dev, uint32_t chan, uint32_t gpio_num)
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{
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dev->etm_event_chn_cfg[chan].etm_ch0_event_sel = gpio_num;
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}
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/**
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* @brief Wether to enable the event channel
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*
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* @param dev Register base address
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* @param chan Channel number
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* @param enable True to enable, false to disable
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*/
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static inline void gpio_ll_etm_enable_event_channel(gpio_etm_dev_t *dev, uint32_t chan, bool enable)
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{
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dev->etm_event_chn_cfg[chan].etm_ch0_event_en = enable;
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}
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/**
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* @brief Set which GPIO to be bounded to the task channel
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*
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* @note One channel can be bounded to multiple different GPIOs
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*
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* @param dev Register base address
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* @param chan Channel number
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* @param gpio_num GPIO number
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*/
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static inline void gpio_ll_etm_gpio_set_task_channel(gpio_etm_dev_t *dev, uint32_t gpio_num, uint32_t chan)
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{
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int g_p = gpio_num / 4;
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int g_idx = gpio_num % 4;
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uint32_t reg_val = dev->etm_task_pn_cfg[g_p].val;
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reg_val &= ~(0x07 << (g_idx * 8 + 1));
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reg_val |= ((chan & 0x07) << (g_idx * 8 + 1));
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dev->etm_task_pn_cfg[g_p].val = reg_val;
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}
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/**
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* @brief Wether to enable the GPIO to be managed by the task channel
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*
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* @param dev Register base address
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* @param gpio_num GPIO number
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* @param enable True to enable, false to disable
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*/
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static inline void gpio_ll_etm_enable_task_gpio(gpio_etm_dev_t *dev, uint32_t gpio_num, bool enable)
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{
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int g_p = gpio_num / 4;
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int g_idx = gpio_num % 4;
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uint32_t reg_val = dev->etm_task_pn_cfg[g_p].val;
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reg_val &= ~(0x01 << (g_idx * 8));
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reg_val |= ((enable & 0x01) << (g_idx * 8));
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dev->etm_task_pn_cfg[g_p].val = reg_val;
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}
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/**
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* @brief Check whether a GPIO has been enabled and managed by a task channel
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*
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* @param dev Register base address
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* @param gpio_num GPIO number
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* @return True if enabled, false otherwise
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*/
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static inline bool gpio_ll_etm_is_task_gpio_enabled(gpio_etm_dev_t *dev, uint32_t gpio_num)
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{
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int g_p = gpio_num / 4;
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int g_idx = gpio_num % 4;
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return dev->etm_task_pn_cfg[g_p].val & (0x01 << (g_idx * 8));
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}
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/**
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* @brief Get the channel number that the GPIO is bounded to
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*
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* @param dev Register base address
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* @param gpio_num GPIO number
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* @return GPIO ETM Task channel number
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*/
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static inline uint32_t gpio_ll_etm_gpio_get_task_channel(gpio_etm_dev_t *dev, uint32_t gpio_num)
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{
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int g_p = gpio_num / 4;
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int g_idx = gpio_num % 4;
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return (dev->etm_task_pn_cfg[g_p].val >> (g_idx * 8 + 1)) & 0x07;
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}
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#ifdef __cplusplus
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}
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#endif
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