esp-idf/components/soc
Jiang Guang Ming 453146fe75 Merge branch 'bugfix/update_esp32c2_soc_memory_addr' into 'master'
soc: update memory address for esp32c2

See merge request espressif/esp-idf!17085
2022-02-22 10:23:35 +00:00
..
esp32 Merge branch 'bugfix/riscv_i2c_description' into 'master' 2022-01-26 03:13:07 +00:00
esp32c2 Merge branch 'bugfix/update_esp32c2_soc_memory_addr' into 'master' 2022-02-22 10:23:35 +00:00
esp32c3 Merge branch 'feature/esp32c3_uart_add_wakeup_event' into 'master' 2022-02-04 17:23:29 +00:00
esp32h2 esp_system: replace the range comparsion for reset reason in perip clk init with specific reset reason check, also add a test case in LEDC to check for the perip clk not being disabled after cpu reset 2022-02-09 15:54:34 +08:00
esp32s2 rmt: do not support rx wrap on esp32s2 2022-02-08 13:57:31 +08:00
esp32s3 Merge branch 'refactor/lcd_soc_ll_update_according_trm' into 'master' 2022-02-12 08:13:34 +00:00
include/soc esp8684: rename target to esp32c2 2022-01-19 11:08:57 +08:00
linux/include/soc build-system: include soc_caps defines into kconfig 2021-12-06 12:37:07 +08:00
CMakeLists.txt soc: move peripheral base address into reg_base.h 2022-01-06 21:43:12 +08:00
linker.lf soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
lldesc.c crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc 2021-05-18 11:25:41 +08:00
README.md soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware