esp-idf/components/soc
2021-07-28 15:41:47 +08:00
..
esp32 G0: Memory layouts are now part of heap components 2021-07-15 11:38:23 +10:00
esp32c3 G0: Memory layouts are now part of heap components 2021-07-15 11:38:23 +10:00
esp32h2 G0: Memory layouts are now part of heap components 2021-07-15 11:38:23 +10:00
esp32s2 Merge branch 'feature/move_memory_layout_to_heap' into 'master' 2021-07-19 06:23:19 +00:00
esp32s3 light sleep: modify some sleep params for esp32s3 2021-07-28 15:41:47 +08:00
include/soc G0: Memory layouts are now part of heap components 2021-07-15 11:38:23 +10:00
CMakeLists.txt G0: Memory layouts are now part of heap components 2021-07-15 11:38:23 +10:00
component.mk Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
linker.lf soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
lldesc.c crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc 2021-05-18 11:25:41 +08:00
README.md soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00
soc_include_legacy_warn.c Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware