esp-idf/components/xtensa
term_est 51a9057d9e Fix possible conversion errors by using __builtin_ffsll instead of __builtin_ffs
Signed-off-by: term_est <62337595+term-est@users.noreply.github.com>
2023-05-11 11:16:45 +08:00
..
esp32 xtensa: move out trax 2021-02-26 19:45:48 +08:00
esp32s2 xtensa: move out trax 2021-02-26 19:45:48 +08:00
esp32s3 hal: Route CPU and Interrupt Controller HAL/LL to esp_cpu calls 2022-06-14 14:40:03 +08:00
include Fix possible conversion errors by using __builtin_ffsll instead of __builtin_ffs 2023-05-11 11:16:45 +08:00
trax xtensa: Pass the test with latest gdb 2021-11-22 18:17:36 +01:00
CMakeLists.txt build-system: add property for architecture (riscv/xtensa) 2022-05-20 09:00:32 +08:00
eri.c Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
linker.lf [system]: put xtensa_intr_asm into IRAM 2021-04-26 12:11:20 +08:00
project_include.cmake build: Adds support for universal Clang toolchain 2022-11-23 13:25:16 +03:00
xt_trax.c xtensa: move out trax 2021-02-26 19:45:48 +08:00
xtensa_intr_asm.S G0: Support Xtensa targets for G0-only compilation 2022-06-20 11:34:20 +00:00
xtensa_intr.c G0: Support Xtensa targets for G0-only compilation 2022-06-20 11:34:20 +00:00