esp-idf/components/soc
houwenxiang 2f1247e1c4 driver: support I2S on ESP32-S3 & ESP32-C3
1. refactor I2S driver.
  2. support TDM mode for esp2s3 & esp32c3.
2021-08-04 10:20:03 +08:00
..
esp32 driver: support I2S on ESP32-S3 & ESP32-C3 2021-08-04 10:20:03 +08:00
esp32c3 driver: support I2S on ESP32-S3 & ESP32-C3 2021-08-04 10:20:03 +08:00
esp32h2 esp_common: Add API for IPC to run small pieces of code on the other CPU, in the context of the level 4 interrupt 2021-08-03 14:35:29 +08:00
esp32s2 driver: support I2S on ESP32-S3 & ESP32-C3 2021-08-04 10:20:03 +08:00
esp32s3 driver: support I2S on ESP32-S3 & ESP32-C3 2021-08-04 10:20:03 +08:00
include/soc driver: support I2S on ESP32-S3 & ESP32-C3 2021-08-04 10:20:03 +08:00
CMakeLists.txt Merge branch 'refactor/move_ldscript_to_soc' into 'master' 2021-07-23 11:54:56 +00:00
component.mk soc: move peripheral linker scripts out of target component 2021-07-22 12:55:01 +08:00
linker.lf soc: move implementations to esp_hw_support 2020-10-28 22:38:50 +08:00
lldesc.c crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc 2021-05-18 11:25:41 +08:00
README.md soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00
soc_include_legacy_warn.c Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware